Don’t forget - 3-D Architectures for Semiconductor Integration & Packaging is about ready to begin (November 17-19, Burlingame CA) .

Keynote speakers include:

• Mike Shapiro – CTO 3D Technology development – IBM
• Shekhar Borkar – Intel Fellow
• Gutej Sandhu – Dir of Technology – Micron

• Ho-Ming Tong - Chief R&D Officer & General Manager of R&D – ASE

If your involved in microelectronics you need to get the latest industry information on this hottest of topics.

Fast focused ion beam (FIB) for cross-sectioning 3D-ICs

Oregon Physics LLC [OP] has recently made me aware of their Focused Ion Beam (FIB) machining service laboratory. They are offering FIB services for a wide array of applications that include 3D integration and bumping and WLP areas which I and you the reader have interest. Normally I read and trash such “equipment advancement” notices, but every now and them I find one that is worth sharing with you.

OP presents the the example shown below of a 300x900µm cross-section and claims that it would take some 10 days to prepare with a conventional gallium FIB beam and that a JEOL ‘Cross-section Polisher’( with a mill rate of only 1.3µm/minute) would take 12 hours. They report that their OP Plasma-FIB milled this structure in a little under 1 hour. A 3µA beam of focused xenon ions was used to polish this cross-sectioned face. The sample has then been tilted to 45° and imaged with a sub-100nm resolution, 100pA xenon beam.

Next we see the cross section of the bottom of a 5 um TSV showing incomplete filling of the plated copper.

The 3^rd figure below shows a 750 um solder ball from the BGA microprocessor package that has been cross-sectioned to reveal the grain structure of the metallic solder ball and also the subsurface interface with the integrated circuit.

Being able to obtain this level of structural information at low cost and in a short time is well worth examining further. Check out their capabilities.

This weekend , before leaving for the 3D meeting in SF, I will load some interesting info from the 3D papers at the recent SMTA WLP Conference in San Jose.

For all the latest in 3D IC integration stay linked to Perspectives from the Leading Edge………