New technology in the vendor’s Olympus system-on-chip place and route product accelerates signal-integrity closure, improving the reliability of manufactured silicon. The multicorner, multimode capability of the product’s static-timing-analysis engine computes delay shift and glitch for a variety of mode/corner scenarios in a single pass. Reducing the time to achieve design closure, the analysis also allows users to address reliability issues, including crosstalk delay, glitch, power, and electromigration. Enhancements to the routing and optimization engines eliminate signal-integrity violations over a variety of scenarios. The product includes per-clock, -corner, and -mode timing-window-computation-enabling technologies. The technology also includes fast incremental signal-integrity updates over all mode/corners during implementation; routing techniques, such as signal-integrity track assignment, wire spreading, and track reordering; and signal-integrity-bottleneck identification for directed concureent delta-delay, delta-slew, and glitch optimization. The new technology costs $870,000 for a one-year time-based license.

Mentor Graphics Corp, www.mentor.com