Delivering today's DAC keynote address, Qualcomm COO Sanjay Jha ended his description of SoC design in the media-rich, wireless, and mobile world with a series of requests and suggestions for the EDA industry. They directly reflect the problems Qualcomm is having with advanced SoC design, and therefore probably serve as good predictors of where other SoC teams will be feeling pain in the near future.

Jha's first two points were relatively high-level. Qualcomm wants tools to automate the process of system design. By this Jha meant not simply chip architecture, but co-design of dice, packaging, and systems. The interactions of package design, physical, and mechanical design of increasingly small mobile-device enclosures, and placement of key components such as displays and antennas are becoming too intense to leave to a manual resolution process after the chip has taped out.

In particular, Jha seemed to be pressing for chip/package co-design. "Everything we ship today is either a mixed-signal/RF SoC or a multi-die package that includes these functions," he said. Especially with demanding RF signals running across pad-ring boundaries, guessing at the package electrical characteristics and variations during the chip design is not an option.

If his initial statement left any doubt about his view of today's tools, Jha made the point more directly: "We have had to respin the substrates on our last two designs because of incorrectly predicted substrate coupling issues." Jha called for better package parasitic extraction, and enough automation and flexibility that designers can model package configurations on the front end of the design flow to gain some control over package cost.

Jha's second request was for hardware/software concurrent design tools. He hardly needed to mention to a DAC audience the amount of time and cost that now go into software development for a mobile-media SoC. Nor did he need to explicitly mention the growing dependence of energy management techniques on the as yet minimal cooperation coming from the software.

During the brief Q/A at the end of his talk, Jha ventured briefly into the question of fair allocation of profits in the electronics industry. He pointed out that the plethora of IC suppliers, including many to whom he referred as "subscale," robs the electronics industry of its rightful share of the profit from consumer devices. "An iPod may sell for $300," Jha observed. "But the chip that provides all the functionality in it sells for $3. Even when the concepts for great products originate in the semiconductor companies, they end up with only 5-7 percent of the ASP. We don't control things like branding and distribution that influence the ASP directly."

Jha discussed the other side of that equation as well. An audience member asked if--given the very substantial investment by EDA vendors implied by Jha's requests--he would be willing to accept a royalty business model for EDA tools. He replied that he was willing to discuss royalties. "But frankly, the threshold of value an EDA tool would have to contribute to enter that discussion is very high. If you are offering to change the way we approach integrated system co-design, then yes, we could discuss it. If you are offering to sell me a block of IP to replace something we could design ourselves in a few months, then no."