Diana65

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Diana65

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  • 09.22.2011
  • Design a 100A active load to test power supplies
  • This is a very nice approach to control the current in a precise way. thanks for publishing it. as far as I understood this smart approach can control the current at a constant output voltage. but if the output voltage has a high dV/dt (like a high-frequency square wave), how can we eliminate or at least decrease the effects of the parasitic capacitance between gate and drain of the MOSFET. this high dV/dt at output voltage can affect the gate voltage of the MOSFET which generates a spike in the output current. I wonder if someone propose a way to overcome this problem.