32-bit MCU family packs memory, peripherals – and code

Microchip Technology has announced its 32-bit PIC32MZ family, featuring 24 devices designed to target connectivity applications requiring a combination of high performance and broad peripheral support. The new family is the first Microchip MCU series to build on the 32-bit Imagination Technologies MIPS microAptiv core, which enables a 30% code reduction compared to earlier 32-bit PIC MCUs. Operating up to 200 MHz, the core delivers 3.28 CoreMarks/MHz and 330 DMIPS.

Along with a dual-pane flash memory for live update support, family members variously include a broad array of peripherals including 10/100 Ethernet MAC, dual CAN ports, and Hi-Speed USB MAC/PHY – the first for Microchip PIC MCUs. PIC32MZ devices also include a 28 Msps ADC, crypto engine, and SQI (serial quad I/O) interface, among other peripherals.

Figure. The Microchip PIC32MZ family surrounds a 200-MHz MIPS microAptiv 32-bit core with an array of peripherals available in various configurations in family members.

The first 12 members of the PIC32MZ family are expected starting in December for sampling and volume production, while the remaining 12, along with additional package options, are expected to become available at various dates through May 2014. The crypto engine is integrated into eight of the PIC32MZ MCUs, and there is an even split of 12 MCUs with 1 MB of Flash and 12 MCUs with 2 MB of Flash.

Pricing starts at $6.68 each in 10,000-unit quantities.

For more information, visit the PIC32MZ page.