Signal conditioning for high-impedance sensors
If you had the option, you probably wouldn't use high-Z (high-impedance) sensors. Their sensitivity to external noise, solder-flux residue, particle tracking, bias currents, and distant charges can make repeatable measurements difficult. High-Z sensors have an upside, though: They don't self-load, and they inherently use little power. For certain variables, such as pH, light, acceleration, and humidity, the most practical sensors are high-Z devices. Because nature offers them, expediency urges their use. Careful attention to design can minimize the devices' tendency to receive adverse effects from the world around them. As an interesting note, with the advent of practical superconduction, impedance values have achieved an infinite range.
When you make measurements to characterize the behavior of any circuit that processes signals from high-Z sensors, you should drive the circuit's inputs through a high Z or a high resistance. Every engineer who works with signal conditioners for high-Z sensors should have some high-value reference resistors at hand. Vishay (www.vishay.com) offers surface-mount resistors with values to 50 GΩ. Samples with values of 1 and 2 GΩ were available off the shelf at press time. The Mini-Mox series from Ohmite (www.ohmite.com) contains leaded 10- and 100-GΩ resistors. All of these high-value resistors are remarkably "stiff" (conductive, nonisolating). For example, a colleague warns users not to touch the resistor bodies, lest skin-oil deposits reduce the impedance.
This warning suggested an experiment. Connecting a Keithley (www.keithley.com) Model 614 electrometer across the resistor leads resulted in a meter reading of 9.9 to 10 GΩ. After thoroughly touching and squeezing the resistor body from lead to lead with oily fingers and then backing away, the meter returned to precisely where it had been: 9.9 to 10 GΩ. This test shows only that skin oils are not an immediate threat to these resistors. To ensure reliability over time and humidity, sound laboratory practice still exhorts keeping components, pc boards, and insulators clean. Skin-oil conductivity is known to vary among individuals. For cleaning, Ohmite recommends using isopropyl alcohol and lint-free wipes and baking the device at 75°C for one hour to drive off moisture. When performing an impedance measurement of this type, bear in mind that the insulator in the cable is entirely in parallel with the resistor under test. Limiting error to 1% in a 100-GΩ-resistor measurement requires an overall insulator impedance of no less than 10 TΩ. The only way around this limitation is to perform an open-circuit calibration to measure and mathematically remove any shunt resistance. The Keithley 614 lacks this feature, but it still performs well, reinforcing the idea that, compared with an insulator, a 10-GΩ resistor is indeed relatively stiff.
Enemies of high-Z circuits
When Z is high, leakages, current noise, bias currents, and static voltages dominate the errors, so dealing with high-Z circuits means minimizing those quantities. The most common and addressable form of leakage is solder-flux residue. Carefully clean any board that supports high-Z circuits to remove all flux. Washers that board manufacturers use can be contaminated. Space traces beyond the minimum design rules to the extent that board area allows. For insulators, FR-4 usually causes no problem, although, unlike Teflon and glass, it does absorb moisture. Some designers have had success with Teflon posts or wells, but the good results may be due to these components' inherent resistance to surface tracking and other effects, such as dielectric absorption, rather than their purely insulating properties. Keeping surface impedances high in imperfect environments may require sealing or conformal coating, but such measures can reduce serviceability. Guard traces connect to high-Z sources with traces at similar potentials. Through-hole pins should have guard traces on all or at least on the outside layers. There are many practical considerations. For example, a dual op amp has noninverting inputs on pins 3 and 5. It is easier to guard Pin 5, because it is in the corner; Pin 3 is next to the negative supplies.
Bias current and current noise in active devices are sources of error. Bipolar transistors require dc base currents to operate; FETs have input leakage. In both cases, electron quantization through junctions induces current noise. (Such noise is present only in currents that flow through junctions.) In FETs, current noise rises with frequency because of Miller effects (see sidebar "Current-noise measurements"). Although you may want to jump immediately to FET-based input structures for their low bias currents, superbeta bipolar input structures can offer advantages, particularly in high-temperature operation. FET-input leakage doubles every 10°C, whereas superbeta bias current remains relatively stable. In either case, chopping techniques can remove the effects of both offset voltage and bias current. For impedances of less than a few megaohms, don't jump immediately to a FET-input amplifier without first considering exceptionally precise, low-bias-current op amps, such as Linear Technology's LT6010 or LTC2054. Sometimes, a lower offset voltage can be more important than a lower bias current.
For a given source impedance, the overall input error is VOS+IBIAS×RSOURCE. As the source impedance rises, the bias-current term dominates, making a MOSFET input more attractive. MOSFET inputs have in recent years gained popularity as CMOS-op-amp specifications have improved.
Another problem with high-Z circuits is their sensitivity to motion. Shoes rubbing against a carpet can generate static charges that can reach kilovolt levels, so even the tiniest capacitive coupling can inject significant charge. When taking measurements, stand back and hold still. Shielding helps, of course, but mechanical vibrations (microphonics) modulate the capacitance between pc-board traces and any local metalwork, causing charge injection—even if the metalwork does not change in voltage but simply stays at a dc voltage different from that of the traces. So shield your circuit, but not too closely.
When mechanical motion or stress induces tiny voltages on insulators, triboelectric or piezoelectric effects occur. In high-vibration environments, high-Z sources may require low-triboelectric-noise cable, such as Belden (www.belden.com) type 9239.
Device and amplifier considerations
Although discrete MOSFETs offer poor leakage specifications, the devices can outperform their specifications by as many as six orders of magnitude. The familiar 2N7002, for example, specifies maximum channel leakage of 1 mA and gate leakage of 0.1 mA. But if you look at these devices in the lab with 20V on the drain and a grounded gate and source, you find a total combined leakage of only about 1 pA. Obviously, the specifications do not reflect what the device does, but rather the cost of production-test time. Tighter specifications require more test time and better test equipment, for which you pay. Of course, tighter specifications also tend toward lower yield; you pay for that, too.
Ultralow-leakage matched-pair JFETs include the LS830 from Linear Integrated Systems (www.linearsystems.com) and the IFN124 from InterFET (www.interfet.com). A favorite single JFET is the Philips (www.semiconductors.philips.com) BF862 because of its 3-pA gate current, its subnanovolt noise density, and its easy-to-deal-with 0.6V pinch-off voltage. The 2N4416 is also popular, especially for its subpicofarad input capacitance and respectable noise density, but many designers have found troublesome JFETs' large and widely varying 2 to 6V pinch-off voltage.
CMOS op amps have for many years been available, but the specifications have been poor, and the actual results, even worse. Linear Technology has just introduced the precision micropower LTC6078 and the higher speed LTC6241 CMOS op amps. The LTC6241 offers a typical input-leakage current of 4 pA at 708C. JFET-input-based electrometer-grade op amps have for many years been on the market but are relatively expensive. In the end, no op amp or semiconductor device is perfect, and some designers find that they can achieve the best dc results with relays and calibrating or chopping techniques.
The circuit in Figure 1 incorporates two force-balance nulling techniques. To follow the operation, assume that all the switches are open and then close S2 and S3, thereby engaging ultraprecision integrating amplifier A2 and forcing A1's output to ground. A1's input offset appears at its positive input, and C1 stores 101 times this offset. Opening S3 allows A1 to function normally again, but with 1 mV of effective offset and approximately 1 mV/sec of drift. Now, opening S2 puts feedback resistor R1 in the circuit and causes an output voltage equal to IBIAS×R1—typically, 1 mV. Closing S4 and S5 nulls A1's output again, but this time through A3. A1's bias current now goes through R2, and C2 stores it as a voltage at 60 mV/pA. Opening S4 ends the nulling phase.
Closing S1 connects the input drive—the resistor under test—and a voltage source. Although the amplifier is now nearly perfect, it doesn't remain so for long. Drift on capacitors C1 and C2 requires a new nulling phase within several seconds; otherwise, the amplifier's specifications may degrade beyond those of an unaided LTC6241. Figure 2 shows a simpler method. Rather than trying to perfect the amplifier, this circuit instead chops the excitation to allow subtraction of the amplifier contributions. Also, the resistor under test is now in the feedback path, so the output is proportional to the resistor's resistance rather than its admittance. Rise time is 10 msec (10 to 90%) with a 1-GΩ resistor, so the excitation should be no faster than about 10 Hz to ensure adequate settling.
Protecting a high-impedance circuit
How can you protect a high-Z circuit without affecting its input impedance? Strictly speaking, you can't, but you can come close. One of the best ways is to use a series resistor and some series inductance, even if it's just a length of trace. The inductance and parasitic elements spread out an ESD (electrostatic-discharge) pulse and improve the odds that it will jump to a chassis before it gets to anything sensitive. You can further improve those odds by introducing a spark gap in the layout near the connector pin to be struck. This approach is cheap and effective, but it can cause problems in higher density digital designs. The spark gap re-emits a strong EMI (electromagnetic-interference) wave, including some eerie blue. This phenomenon repeatedly crashed an onboard but distant 486 microprocessor, fortunately without harming the hardware. The protection you require depends on the level of immunity you specify for the design. In this case, the spark gap is a failure, because designers did not allow for PC-reset interventions. For analog designs or simple digital designs, spark gaps should not be a problem. Gas-discharge tubes, which are also available as components, are other alternatives.
Almost anything you do with diode clamps can cause leakage. Schottky diodes are probably out of the question because they tend to leak more. Ultralow-leakage diodes include the CMPD6001 series from Central Semiconductor (www.centralsemi.com) and the BAS416 from Philips. But the maximum-leakage specification, even when devices are cold, is 500 pA to 5 nA. The high-temperature specifications are even worse, often running into microamps. For the lowest leakage performance, JFET junctions still outperform diodes. The 2N4393, available from Vishay in an SOT-23 package, typically leaks 5 pA at room temperature and 3 nA at 100°C (Figure 3). Compare this leakage with the maximum-specified bias current of 75 pA at 70°C for the LTC6241. Adding even good diodes can cause a significant degradation. Some design work can help offset this problem, however. For example, consider the tracking-limiter circuit (Figure 3). A2 back-biases the diodes, and C1 stores the average dc voltage. The system shunts overvoltages and spikes to the reservoir capacitor but allows dc through with unity gain, protecting the inputs and improving input-overload-recovery time. For dc gain, simply short C1 and move the input from A2 to A1's inverting input; inverting circuits are easier to protect, because you can simply connect the diodes to ground.
How higher Z helps
Figures 4 and 5 show two approaches to amplifying signals from a capacitive sensor. The sensor in both cases is a 770-pF piezoelectric shock-sensor accelerometer, which generates charge under physical acceleration. Figure 4 shows the classic charge-amplifier approach. The op amp is in the inverting configuration, so the sensor looks into a virtual ground. The op-amp action forces all of the charge the sensor generates across the feedback capacitor. Because the feedback capacitance is 0.01 times the sensor capacitance, the voltage across the feedback capacitor is 100 times what would have been the sensor's open-circuit voltage. So, the circuit gain is 100. The benefit of this approach is that the circuit's signal gain is independent of any cable capacitance between the sensor and the amplifier. Hence, designers favor this circuit for remote accelerometers whose cable length may vary. Difficulties with the circuit are inaccuracy of the gain setting with the small capacitor and low-frequency cutoff because the bias resistor works into the small feedback capacitor.
Figure 5 shows a noninverting-amplifier approach. This approach has many advantages. First, resistors, rather than a small capacitor, accurately set the gain. Second, the low-frequency response improves because the bias resistor working into the large 770-pF sensor, rather than into a small feedback capacitor, dictates the cutoff frequency. Third, you can sum and make parallel the noninverting topology for scalable reductions in voltage noise. This circuit's only drawback is that the parasitic capacitance at the input slightly reduces the gain. This circuit is a good fit for applications in which parasitic input capacitances, such as traces and cables, are relatively small and invariant.
When you calculate the bias resistance for the desired low-frequency cutoff, consider that you may want to make the bias resistor's value still larger. Doing so reduces the noise floor at low frequencies. For example, if you want to support frequencies as low as 10 Hz at –3 dB, the bias resistor works out to 1/2π×10 Hz×770 pF=20 MΩ. At 10 Hz, the 20-MΩ resistor contributes 580 nV/ of noise, which is 3 dB down, just like the signal. If you make the resistor value 1 GΩ, the accelerometer capacitance effectively attenuates the resistor's 4000-nV/ noise to 80
nV/, but the signal is barely attenuated. Sometimes, impedance higher than that normally required actually helps.
Devices and materials are available to support and protect high impedances. Dealing with high impedance requires a knowledge of what are otherwise minuscule phenomena. Sometimes, quantization of phenomena such as current noise can be challenging, but with the right circuit techniques, measurements become meaningful and repeatable. A proper breakdown of error sources, such as leakage, settling time, voltage noise, and current noise, helps the circuit designer to know what to expect.
|The author acknowledges the contribution of Peter Haak for his input on gain calibration during current-noise measurements in transimpedance circuits.|
|Current-noise measurementsFigure A
Measuring is easy when there is a lot to measure and difficult when there’s little to measure. FETs have little current noise, especially at low frequency, which makes the noise inherently difficult to measure. At high frequencies, FET input-current noise rises due to Miller effects in the drain or tail current noise blowing back through the gate-source capacitance, depending on circuit topology. The fact that more current noise exists at high frequency would make it easier to measure, but bandwidth rolls off in any practical high-impedance circuit.
For the low-frequency measurement, simply configure the op amp as a unity-gain buffer with a 10-GΩ source resistor to ground (). Use batteries and enclose the circuit in a cookie tin with a BNC through connector to access the output. Measure the output dc voltage and make sure that it’s reasonable given the op amp’s typical specified bias current (IBIAS=VOUT/10 GΩ). If it looks reasonable, then make a note of the measured value. Now, look at the low-frequency-output content, using a spectrum analyzer. Make sure you are looking below the roll-off of the input circuit. An input capacitance of 3 pF acting on a 10-GΩ source causes a lowpass roll-off 3 dB down at 5.3 Hz. Below that frequency and using averaging, you should be able to see the 13-μV/-at-room-temperature noise density of the 10-GΩ resistor take shape (Figure B). If the circuit is properly functioning and shielded, any additional output noise is due to input-current noise’s acting on the 10-GΩ source, because the amplifier’s input-voltage noise is relatively minuscule.
This single plot of output noise gives two measurements: low-frequency input-current noise and input capacitance, CIN. The low-frequency input-current noise derives from the
13.6-μV/ output noise.
Using the same circuit, but looking at higher frequency, you can also see the effect of the rising current noise (Figure C). Note that the output-voltage noise goes flat at high frequency, because, although the current noise is rising, it is looking into the input capacitance, which has falling impedance with frequency. Therefore, the product is flat. At 100 kHz, the 3.7-pF input capacitance looks like 430 kΩ. So, the 50-nV/ output noise divided by 430 kΩ must be due to 116 fA/ of input-current noise at 100 kHz. You can now plot the input-current noise as a function of frequency, which you thus far measured only at the positive input (Figure D). At low frequencies, it is a flat 0.4 fA/, rising at a rate of 1.16 fA/ per kilohertz at high frequency. (Put in more fundamental units, the rate of rise of current noise with frequency is 1.16 attoamps×Hz–3/2).
For the high-frequency case, many engineers prefer to have a test circuit that is closer topologically to the intended application circuit. They commonly employ a transimpedance circuit because it is the most frequently used application circuit for low-current-noise, high-impedance circuits, which you usually apply to photodiodes. The circuit in Figure E emulates a transimpedance photodiode amplifier with C2 taking the place of a 1.5-pF photodiode and C1 being a short circuit at a high frequency. The bandwidth rolls off due to the combination of finite op-amp gain bandwidth and the noise gain of the R2-C2 feedback network increasing with frequency. This situation is more complicated than the single RC input you encountered previously. Fortunately, the current noise rises with frequency, which is undesirable except when you’re trying to measure it. Figure F shows the circuit’s raw output noise spectrum with VIN open. The 20-MΩ resistor noise at 582 nV/ dominates the flat region on the left, and the noise figure there is near 0 dB. The noise clearly rises with frequency, but this situation could be due to either rising current noise or voltage noise and rising noise gain. A quick calculation can help determine whether either one is dominating, but you should first perform a gain calibration with frequency. R1 and C1 provide the window for excitation and thereby a gain measurement.
At a glance, the whole circuit of Figure E is an integrator followed by a differentiator, so it should have a flat response. In fact, at low frequencies, response rolls off, because the R1-C1 integrator has no gain. But, at frequencies, well above R1×C1, the current through C2 goes constant with frequency, as with an ideal photodiode, and the gain does indeed go flat (Figure G). The midband gain factor is R2×C2/R1×C1, or about 30 mV out per 1V excitation in. These values are easy to confirm in the lab, and, with an accurate measurement, the component tolerances become unimportant, and you can normalize the measured gain, or attenuation. At still higher frequencies, the differentiator starts to have bandwidth trouble due to the finite-gain bandwidth of the op amp and the noise gain of the circuit and the parasitic capacitances around R2. The result is that the gain drops with frequency, as you would expect.
The important thing is that you measure the output noise with exactly the same circuit as the gain, including the op amp and the parasitics but without the excitation. Dividing the resulting output-noise-versus-frequency data and dividing by the normalized-gain-versus-frequency data yields a bandwidth-corrected version of output noise as if the op-amp had infinite gain bandwidth and the feedback resistor had no parasitics. Some signal analyzers, such as the HP3562, do an excellent job of waveform division and plot generation and maintain correct units for this analysis. If you don’t have one, you can use a sample calculation instead. If you can perform the calculation at one frequency, it eventually becomes easy to perform them at all frequencies.
Again using an LTC6241 as the device under test, you can measure a midband gain of 0.0290 at 4 kHz—down from the nominal 0.030, probably due to C2’s tolerance, (Figure G), At 100 kHz, the gain rolls off to 0.0212, or about 0.73 of the midband gain. You can apply this gain correction to the noise measurement at 100 kHz.
At high frequency, the noise rises, even though the response is falling (Figure F). At 100 kHz, output noise is 1.61 μV/. To correct for the gain roll-off, dividing by the 0.73 from the gain curve yields 2.20 μV/, still output-referred. This value would be the output noise with an infinitely fast op amp and no shunt capacitance around the 20-MΩ feedback. To refer this noise to the input, many designers simply divide by the 20-MΩ feedback impedance for a
110-fA/ input-referred current noise. But this approach neglects the fact that some of the output noise is due to input-voltage noise. You need to perform the calculation earlier to determine which noise is dominant.
The voltage noise of the op amp gets to the output multiplied by the noise gain. The LTC6241 input capacitance of 3.5 pF (CDM+CCM) combines with C1 to make 5 pF. Assume 1 pF of additional parasitics for a total of 6 pF. At 100 kHz, this approach yields 265 kΩ. Noise gain is 1+Zf/ZSHUNT, or 1+20 MΩ/265 kΩ=76. The input-voltage noise of the LTC6241 is 7 nV/, so at the output, it would contribute 76×7 nV=532 nV/. Subtracting this rms-wise from the 2.20 μV/ gives 2.13 μV/, which is not an appreciable correction but does reduce the 110-fA/ current-noise calculated above to 107 fA/.
When measuring an op amp’s current noise in this way, it is critical to sift out the effects of voltage noise. The circuit of Figure B lacks this complexity because the voltage noise is swamped in all cases, the noise gain was a solid unity, and the bandwidth was uncompromised. Therefore, the fact that the two measurement techniques on two devices on two inputs yield current-noise results within 10% of each other reveals that the op amp has a good symmetric input structure and repeatability from device to device and that the techniques are reliable.