Design an efficient reset circuit

-May 01, 2003

When you work with microprocessors, you must ensure that when the power-supply voltage fluctuates to the minimum permissible level, VL, that the processor's ALU continues to operate normally. Also, when you switch on the power supply, the ALU must operate normally when the supply voltage equals or exceeds a certain high level, VH. The minimum and high levels constitute a hysteresis band (VHYST=VH–VL), and fluctuations in supply voltage within this band should not perturb the logic operations of the processor (Figure 1). A properly designed reset circuit can ensure proper operation of a microprocessor. One requirement of an efficient reset circuit is that it operates properly over the intended temperature range—for example, –40 to +85°C. Several reset circuits are available that meet the voltage conditions, but the temperature constraints render them unsatisfactory. This Design Idea proposes a small, inexpensive reset-circuit structure.

The supervisor circuit includes a comparator with hysteresis (Figure 2). The circuit represents a noninverting comparator; the voltage to supervise is VCC. The comparator takes a sample of VCC via the R1-R2 voltage divider and compares it with the reference voltage, VREF. You obtain VREF by using a battery voltage, VBAT, but VCC would work as well. The pullup resistor, ROUT, is necessary to obtain a positive voltage at the output, because the comparator's output has an open-collector or open-drain structure. The following approximate and exact equations are based on selection of VH and VL. (Remember that VHYST=VH–VL.)

In the approximate equations, you disregard ROUT, because its value is negligible compared with that of R3. But the value of ROUT affects VL, because ROUT and R3 are additive when the comparator is in the high-impedance (off) state. Choosing values for VHYST and VL and knowing VREF, you obtain the following approximations: R1=R2(VL/VREF–1), and R3=R1(VREF/VHYST). Now, you add a timing circuit to the hysteretic comparator (Figure 3). When VOUT1 assumes a low level, VOUT2 switches to a low level and discharges CRST. When VOUT1 switches high, comparator IC2 switches to its high-impedance state, and CRST begins to charge through RRST. VOUT2 follows an exponential curve and arrives at a value, VRSTEND, which signals the end of the reset signal (Figure 4). You can modify the tRST by adjusting the values of CRST and RRST. Now, if you add another comparator, IC3 (Figure 5), you obtain the waveforms of Figure 6.

The final reset circuit appears in Figure 7. The circuit has four comparators, one voltage reference, seven resistors, and three capacitors. To determine the resistor values, you can use the following equations: R1=R2(VL/VREF–1), and R3=R1(VREF/VHYST). An appropriate comparator IC is the quad LM239 (–25 to +85°C) or the LM139 (–55 to +125°C). The voltage reference is the 1.2V ICL8069CMSQ (–55 to +125°C). C1 and C2 stabilize high-frequency fluctuations and have values of 100 nF and 10 µF, respectively. RREF has a value of 50 kΩ, and R4 and R5 have values of 5 to 100 kΩ, depending on the circuit you wish to control. If you chose VL=4.75V, VHYST=0.1V, and R2=10 kΩ, you obtain R1=29.6 kΩ and R3=355 kΩ. For timing the reset, you use the capacitor-charging equation, V=VCC(1–e–t/RRST/CRST).

The final instant of reset occurs when V=VREF=1.2V. Choose 5V for VCC. The equation then becomes t=–RRST–CRSTln(1–V/VCC). If you choose t=1 sec and CRST=10 µF, then

You obtain RRST=36.4 kΩ. If CRST=1 µF, then RRST=364 kΩ. It's preferable to have a low value for CRST because of the low current in the comparator's output transistor. Solving for R2, you obtain R2=10 kΩ.

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