NCO technique helps µC produce clean analog signals
Steve Ploss, Veridian Corp, Wright Patterson AFB, OH
A recent Design Idea described a method for producing an analog voltage from one digital output of a µC ("Generate an analog signal with a µC," EDN,Oct 22, 1998, pg 108). The method involves generating a PWM output with a controlled duty cycle and filtering the switching waveform with a simple single-pole RC filter. Although this method provides an accurate dc output with 8 bits of resolution, it requires a filter with a low cutoff frequency to reduce the ripple to less than 1 LSB.
An alternative method doesn't have this problem. The circuit in Figure 1 and the corresponding control program borrow a technique from direct digital synthesizers. The technique consists of a numerically controlled oscillator (NCO) that distributes the duty cycle as evenly as possible across the main period of the output, which is 256 clocks for both the NCO and PWM approaches. Figures 2a and 2b illustrate the operation of the NCO and the PWM methods, respectively, with the duty cycle set to 10/256. Figure 2a's NCO digital output has the same duty cycle as Figure 2b's PWM output but distributes the duty cycle evenly across the period.
The benefit of the NCO is that the ripple amplitude after filtering is almost constant with changes in the duty cycle. In contrast, the PWM method has a ripple amplitude equal to that of the NCO approach at the lowest duty cycle, and the ripple worsens at midscale.
Figure 3 compares the expected output for each of the two methods using the same duty cycle as before, 10/256. A simple IIR filter that simulates a single-pole RC low-pass filter, performed the filtering. The time constant for this filter is 256 clocks. This figure shows that the NCO output has much lower ripple than the PWM output at this output duty cycle (Figure 3a). As the DAC value approaches midscale, which corresponds to a duty cycle of approximately 128/256, the PWM ripple gets progressively worse, but the NCO ripple improves by as much as a factor of 2 (Figure 3b).
The DAC routine uses only two registers; the phase accumulator and the holding register form the DAC input value. Two additional registers provide sine-wave values to the DAC routine. On initialization, the phase accumulator sets to zero, and the DAC value sets to midscale (0x80). On each update, the value of the DAC register adds to the phase accumulator. When the phase accumulator rolls over—an event signaled by the setting of the carry bit—the circuit sets the output high for one update. The process then continues indefinitely. To generate a sine wave, the program counts the number of times it loops and every 32nd time it retrieves the next value from the look-up table. The table holds 16 values of a full cycle, so the period of the sine wave is 512 times the loop time, plus a small amount of time for the branch out of the loop. With a 20-MHz crystal, the loop time is approximately 3.5 µsec, and the sine-wave frequency is approximately 625 Hz.
To output an analog waveform, you need only to change the value of the DAC register. This change can happen at any time. The analog output almost immediately starts updating. When you use this method for your own application, remember to update the DAC output as often as possible to lower the ripple amplitude. The rate need not be precise, because you are merely setting a duty cycle—the period of which is relatively unimportant. More likely, you need to control the period of your analog waveform.
If you can afford to use a µC with a timer interrupt, it's best to use that interrupt to determine when to change to the next DAC value. The rest of the time, you can continuously update the output. If you don't want to use the timer interrupt, you can update the DAC as part of a polling loop, as shown in this example, waiting for a loop counter to reach a predetermined value before changing the DAC value. However, you may want to make sure that the branch from the polling loop always takes the same amount of time, so that the DAC-value changes occur at a constant rate. Also, if the branch is going to take a comparatively long time, consider setting the output bit to a high-impedance state for the duration of the branch. If you do not take this precaution, the output will hold the last value—whether high or low—for the duration of the branch and could produce a transient on the filter output. (DI #2346)
µC generates musical sounds
Abel Raynus, Armatron International, Melrose, MA
Many modern devices send audible signals to their operators to indicate some of the predetermined conditions or states of the system under control. To avoid annoying human sensibilities, these sounds should match the musical scale. Several chips on the market provide such sound capabilities; for example, a programmable sound generator or an ISD1016 voice messager. The circuit in Figure 1 does not use a dedicated sound generator but rather generates sounds using software routines. The circuit uses an inexpensive MC68H705J1A µC and saves additional expense by eliminating the need for a sound chip. In Figure 2a, a note represents the pitch of each musical tone; Figure 2b shows the duration of the tone.
The first step in programming a sound-output system is choosing the type of sound signal: individual sounds or a section of a melody. As an example, consider a portion of the song Jingle Bells. Write the sequences of pitches and durations into the tables of Figure 2 and then put them into memory in addresses aMEL and aDUR (Listing 1). The addresses of these tables occupy the end of the available EPROM space. The commentaries in Listing 1 explain the structure of the subroutine MELODY. The std-jia.asm file is the standard address list of the registers and the bytes of the µC. (DI #2336).
Continuity buzzer is frugal with power
Hans Krobath, EEC, Nesconset, NY
The continuity detector in Figure 1 is based on W Dijkstra's "Fleapower circuit detects short circuits" (EDN, July 2, 1998, pg 122). The buzzer indicator allows you to devote full attention to making the connection without having to observe an LED. The circuit also consumes less power than Dijkstra's circuit. Power comes from two AA or AAA cells, which last for a period equal to their shelf life. Current consumption is less than 2.5 mA when the circuit detects continuity and less than 1.7 mA for an open circuit. Open-circuit voltage is less than 100 mV, and short-circuit current is less than 1 mA. You can use a number of op amps for IC1, provided that the specs indicate rail-to-rail operation with a low-voltage single supply.
The piezo oscillator driver uses only 700 µA when operating and consumes only Q1's leakage current when it is not operating. This type of piezo transducer is a passive, resonant-feedback type, which provides high power efficiency and low-voltage operation. With RX values greater than approximately 12W, the inverting input of the op amp is at a higher potential than that of the noninverting input. The resulting output is 0V plus the saturation voltage of the output stage. This output provides no bias current through R5 and thus keeps Q1 cut off. With RX values lower than approximately 12W, the inverting input of the op amp has a potential lower than that of the noninverting input. The resulting output is 3V minus the saturation voltage of the output stage. The approximately 3V output biases Q1 into the linear region. Q1 and the piezo transducer, with their associated feedback, oscillate at their resonant frequency. Most transducers and the listed op amps operate with supply voltages as low as 2V. (DI #2350).
Stereo jack adds no-cost power/logic control
Gary O’Neil, IBM Microelectronics, Research Triangle Park, NC
Many battery-powered devices use peripherals that require only two conductors to complete their interfaces. You can use stereo phone jacks and monaural plugs to perform power- or logic-control functions in addition to completing their required I/O connections. Monaural plugs short-circuit the ring and sleeve of stereo jacks. You can place the ring connector, normally considered a redundant ground return, into service as an spst switch. A simple wireless transceiver illustrates how you can use stereo jacks for switching with monaural plugs, stereo plugs, or both (Figure 1 and Figure 2). Using the design in Figure 1, you can connect the battery return to the ring of stereo jacks serving one or more I/O devices. The circuit in Figure 2 connects the returns of individual circuits to the ring.
With this scheme, power control becomes automatic with the plugging and unplugging of devices using monaural plugs, by virtue of the ring-to-sleeve short circuit. Three examples illustrate the principles of operation. In the first example, the transciever comprises a transmitter, a receiver that contains an audio amplifier, a battery supply for power, and two stereo phone jacks (J1 and J2) for transmitter modulation and audio output, respectively (Figure 1). J1's tip connection carries the modulation input to the transmitter. This input could be a keying line for CW (continuous modulation, for Morse code); a digital modulation interface; or an analog input, such as in a wireless microphone. The output of the audio amplifier (demodulated digital data, control tones, voice, music, or other) connects to the tip of J2 .
With no peripheral attached, the negative side of the battery floats, with no return to ground. Therefore, the transceiver receives no power. The negative side of the battery connects to the rings of all jacks you want to use for power-on/off control. Inserting a telegraph key, digital-modulation device, or microphone into J1 via a monaural plug connects the negative side of the battery to ground via the ring-to-sleeve short circuit, and the transceiver turns on. Plugging an earphone or speaker into J2 via a monaural plug completes an alternate, or redundant, ground return for the battery. Thus, inserting a plug into either jack completes the power path to all the transceiver circuits.
In another example, you can selectively isolate and enable circuits using stereo jacks to maximize power conservation. When you plug a peripheral into J1, the circuit in Figure 2 enables only the transmitter circuit. When you plug a peripheral into J2, the circuit enables only the receiver and audio-amplifier circuits. The return paths of the individual circuit functions float and connect to the ring of one or more stereo jacks associated with a peripheral that requires those circuit functions to operate. The battery permanently connects to the same ground reference as the sleeve of all jacks. You need both the receiver and audio amplifier to operate during the receive function; they share a common return path with the ring of J2. You enable these circuits by inserting an appropriate peripheral (speaker or headphone) into J2 via a monaural plug.
In the final example, you can further conserve power in specialized cases featuring remote on/off control, such as for transmitter on/off keying (Figure 2). You use insert a stereo plug into J1 to remotely locate the ring/sleeve connection. The ring/sleeve path to the negative side of the battery is incomplete until a peripheral switch or a key closes. You can define a ring/sleeve, tip/sleeve, or ring/tip/sleeve short circuit and use it to complete the desired electrical connections. In this example, the circuit consumes power only when you enable the transmitter; thus, you have maximum control of battery resources. (DI #2355).
S/H circuit minimizes aperture
John Guy, Maxim Integrated Products, Sunnyvale, CA
Conventional sample-and-hold (S/H) circuits use one hold capacitor that charges during the track phase and disconnects during the hold phase. The voltage that the capacitor holds usually drives an A/D converter that operates synchronously with the S/H control signal. This approach can sometimes place excessive demands on the S/H circuit's bandwidth and settling capabilities. You can improve performance by using two hold capacitors to implement continuous sampling (Figure 1). One capacitor or the other is always sampling the input signal, and the output is always the held value. A phase-reversal switch (IC1) interconnects the input, output, and hold capacitors.
When the control signal (Clock) is low, the input connects to the C2 hold capacitor via R2. C2 and the on-resistance of the switch form a 160-nsec time constant, providing ample time to charge the capacitor. When Clock goes high, C2 connects to the output via the lower switch, and C1 connects to the input. Many factors affect the performance of this circuit. Droop rate on the hold voltage, for example, is a strong function of the output-load impedance. If the A/D-converter load is excessive, you should add a buffer amplifier at the output of the S/H circuit. The hold capacitors should be low-dielectric-absorption types, and the phase-reversal switch should specify low charge injection and make-before-break timing. Figure 2 (input and output at 100k samples/sec) and Figure 3 (detail at 400k samples/sec) show good performance with the values shown. The high-speed transitions exhibit little overshoot or ringing. (DI #2354).