Understanding and designing wideband output networks for high speed D/A converters.

By Jarrett Liner, RF Systems Application Engineer, I&I Segment, Mil/Aero Group, Analog Devices -March 19, 2014

Today the demand for new IC components and technology continues to grow at alarming rates. The commercial and defense industry are leaders in this charge. Most new specifications dispatched to the semiconductor industry today revolve around reduced size, weight and power or SWaP. Here in the semiconductor industry we meet those requirements by ever improving technology and clever designs.  However, performance is still a key demand as well, especially for Digital to Analog Converters (DAC) technology in the GSPS space. To keep this pace, the analog output matching network is often overlooked as a key element.

In order to provide more clarity, high frequency is considered to be over 1 GHz, high speed is considered to be over 1GSPS; most importantly the end user may incorporate an amplifier after the DAC therefore useable signals are less reliant on signal level, and more on noise and fidelity. In this paper, the matching component and their interconnectivity will be discussed. Particular attention will be given to the key specifications to consider when selecting a transformer or balun along with connection configuration techniques. Finally, ideas and optimization techniques will be provided to show how to achieve a wideband smooth impedance transformation for DACs operating in the GHz region.

Setting the stage

DACs have wide range of uses; some of the most obvious uses include complex waveform generation at high frequency for commercial and military communications, wireless infrastructure, Automatic Test Equipment (ATE), and RADAR and military jamming electronics. Once the system architect has found the right DAC, the output matching network must be considered to preserve the signal constructed. The component selection and topology become even more important as the GSPS DACs applications require operation in the super-Nyquist, where the desired spectral information is in the 2nd, 3rd or 4th Nyquist zone.

Intellectual Prerequisites

First let us consider the role of the DAC and its position in the signal chain. A DAC functions much like a signal generator. It can provide single tone to complex waveforms at a range of center frequencies (Fc). Historically the Fc max is in the first Nyquist zone, or half the sample frequency. Newer DAC designs have internal clock doublers to effectively double the first Nyquist zone; we can refer to this action as ‘mixed-mode’ operation. The natural output frequency response curve of a DAC using mixed-mode takes on the shape of a sinX/e^(X^2) curve, see Figure 1.


System architects can consult the product datasheet to understand component performance. Often performance parameters such as power level and Spurious Free Dynamic Range (SFDR) will be listed at various frequencies. The clever system designer can extend the use of the same DAC into the super-Nyquist zones mentioned earlier. It’s noteworthy to mention the expected output level will be significantly lower at higher frequencies (zones), for which many signal chains might include the additional gain block or driver amplifier after the DAC to compensate for this loss.



Figure 1: DAC Sinx/x Output Frequency Response vs. Mix Mode

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