Building a JFET voltage-tuned Wien bridge oscillator

-September 13, 2017

JFETs are not an ideal resistor, within in these limitations, the two matched JFETS in the LSJ689 are good enough to be used as the Wien bridge tuning element. LSJ689, being a P-channel JFET, has the advantage of a positive going voltage increasing the JFET’s drain-to-source resistance. This allows easier voltage control compared to an N-channel JFET which requires a negative going voltage to increase the JFET’s drain-to-source resistance.

Typical ‘ON’ resistance of the LSJ689 is about 120 ohms with the gate-to-source voltage at zero. The data sheet specifies a Voltage Gate Source ‘OFF’ (Drain-to-Source resistance to the maximum that this JFET is capable of achieving) between 1.5 to 5 volts. This specification affects what the drain-to-source resistance will be at a given gate-to-source voltage, directly affecting the tuning frequency and tuning range of the Wien Network. Differences between drain-source resistances of the JFET pair will affect Wien bridge tuning-set frequency and amplitude as illustrated in the Network Analyzer plots. The LSJ689 has low gate-to-drain capacitance of 8 pF with the drain-to-source voltage of 15 volts at 1 MHz. Given these innate personality specifications of the LSJ689, let’s try making a 250 kHz to 1 MHz voltage-tuned Wien bridge oscillator.

The amplifier used as the gain element in this Wien bridge oscillator is a very basic three-transistor differential amplifier (Diff-Amp) with a complementary emitter-follower output section. This was designed to be simple, have enough bandwidth to function in a 1 MHz oscillator, with low impedance positive and negative feedback loops, and still have some load driving capability. The open loop gain has been designed to be about 14 to allow ease of feedback loop closure (gain required for oscillations about 9.5db or x3), reasonable distortion performance and acceptable DC stability.

K489A-K489B are LSK489 matched N-channel pairs used at the input. The tail current of this differential pair is set to about 4.5mA by the J511 current source diode. This current is split between the two JFETs in the differential pair. Non-inverting input JFET K489A has a load resistor R9 of 1K ohm and a diode D1. The 1K ohm resistor sets the gain to about two. The diode adds one diode voltage drop to the voltage across R9 to help compensate and negate some of the temperature effects of the common emitter amplifier connected to it. Inverting input JFET, K489B, acts as a source follower increasing the impedance of the negative feedback path for the input of this amplifier.

Q2 is Common-Emitter amplifier (CE). DC bias for this CE amplifier is achieved by the voltage drop across drain resistor R9 and D1, gain set by DC offset trimmer R11, R12, Re’, collector resistor R13 and energy required by the emitter-follower output section. The variable resistor, R11, is used to adjust the DC offset of the amplifier by adjusting the collector current into R13. The resulting voltage drop across R13 is set to achieve near zero volts at the output of the amplifier. Operating current of this CE amplifier is 11mA, enough current to allow the required amplifier bandwidth and driving of the emitter follower output section. Since this CE section of the amplifier is set to a gain of about seven using localized feedback, amplifier stability is achieved by taking advantage of the inherent collector-to-base capacitance of Q2.

The three diodes D3, D4, D5 produce about a 1.8 volt drop to bias the NPN and PNP emitter-followers used for the output stage. Base resistors R14, R15, on the emitter followers, are required for errant oscillation stability; emitter resistors R16, R17 are required to maintain bias stability over temperature. Output section bias is set at 12mA to allow driving the low impedance Wien network positive feedback loop and optoresistor-modulated negative feedback loop and still have some current available to drive a load.

The voltage-tuned Wien network consists of an LSJ689 dual P-channel JFET as the pair of voltage controlled resistors. Drain-to-gate feedback resistors R3, R6 aid in linearizing the JFET’s effective resistance curve while R2, R5 make up a voltage divider for the gates of J689A and J689B. R4, R7 in shunt across the JFETs limit their variable resistance range from near 120 ohms to about 650 ohms as the gate voltage changes and also aid in linearizing the JFET’s resistance curve. C3 isolates the JFET tuning voltage away from the non-inverting input of the amplifier. The 6.8 volt Zener, D2, limits the voltage that can be applied to the JFET’s gate, effectively limiting their variable resistance range and tuning frequency range of this voltage-tuned Wien bridge oscillator.

R1 limits the current available to Zener D2. C7 with R1 provides some control voltage filtering of high frequencies into and out of the oscillator. C1 and C2 make up the remainder of the Wien network. Oscillator frequency decreases with increasing tuning voltage.

The Wien network, as illustrated in the schematic at the end of this paper, with the parts used, oscillates at about 1MHz with 0V at the Voltage Control (VC) input down to about 250kHz with 7V at the VC input or decreasing 110kHz per volt. Tuning frequency per volt is not linear due to the JFET’s inherent nonlinearities.

Top trace is a 0v to 10v; a two second ramp, driving the VC input
Bottom trace is the oscillator’s output, starting at 1MHz stopping at 250kHz
Trace envelope illustrates uniform oscillator level over its tuning frequency range.

To control and stabilize the output level of this oscillator D6, D7, R21 make up a 1.2 volt reference for Q4 resulting in about 0.6 volts across the emitter resistor R22 to create a 2mA current source.

This 2mA of current is applied to D11. Driving 1.8mA into D11 will reduce the resistance of R19 to about 100 ohms. With R19 at 100 ohms and the fixed negative feedback resistor R18 of 619 ohms, the closed loop gain of the amplifier increases to about seven. This amount of amplifier gain with the inherent noise of the parts involved, starts up the oscillator. Once the oscillator’s output level is high enough to drive the peak detector network R23, D8, C4, the divider R24, R26 sets the amount of base-drive available to forward bias the base-emitter junction of Q5. Divider R24, R26 also sets the oscillator’s output level.  Once there is enough base drive into Q5 to overcome its base-emitter voltage, that also serves as the voltage reference for the oscillator’s level control. Q5 begins to conduct, current begins to flow from collector to emitter, reducing the current available to drive D11. Reducing the drive to D11 increases the resistance of R19, altering the voltage divider ratio with R18 lowering the amplifier’s gain, stabilizing and leveling the oscillator’s output. Oscillator level control loop stability is determined by C4, R24, R26 and the inherent LED light output to photoresistor’s resistance change-reaction-time baked into the optoresistor module D11-R19.

Harmonic content of the oscillator’s output driving a 500 ohm load at 1MHz: No record setter, but an acceptable set of tradeoffs given what the parts involved will allow.

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