How to send full-duplex data over a single twisted-pair CAT-5 cable

-September 19, 2017

Higher data throughput, shorter response time, and lower installation costs are the key drivers behind the ongoing improvement efforts in industrial network design. That is why allowing the immediate and continuous exchange of binary data has made the full-duplex bus the preferred interface choice in point-to-point connections. Unlike the half-duplex interface, which only transmits or receives data one direction at a time, the full-duplex interface does both simultaneously. This promptness however, comes at the expense of increased cabling effort and installation cost (Figure 1).

Figure 1 Full-duplex interface requires twice the cabling effort of a half-duplex interface

To counteract this drawback, the world of RS-485 users is seeing a new type of interface emerging that allows for full-duplex data transmission over a single twisted-pair cable. Violating one of RS-485’s fundamental principles of avoiding bus contention at all times, this point-to-point interface relies on bus contention by keeping two full-duplex transceivers permanently enabled.

To enhance interface noise immunity, the transceivers are galvanically isolated. This keeps the bus free from common-mode noise, ensuring reliable data transmission in electrical noisy environments with common-mode voltages of up to ±600V.

Full-duplex communication over a single signal pair requires 4-to-2 wire conversions between the transceivers and the bus cable to distinguish the incoming (receive) data from the outgoing (transmit) data (Figure 2).

Figure 2 Full-duplex transmission over single twisted pair requiring 4-to-2 wire conversion

The design of a 4-to-2 wire converter is the tricky part. Although there are circuits available for solving the data separation digitally, their high component count and complicated PCB layout result in rather expensive designs. This approach also has a major drawback: the circuits only work in a low-noise lab environment. In addition, exposing the circuits to high common-mode voltages causes them to cease operation.

To provide designers with a robust high-speed solution that transmits 4Mbps over 350ft cable length while tolerating high common-mode voltages, this article discusses the design of a bus node, comprising an isolated full-duplex transceiver and six resistors, performing current limiting, line termination, and 4-to-2 wire conversion.

Bus node design

There are three main aspects to be considered during the bus node design (Figure 3):

  • Current limiting: Since both transceivers are consistently active, bus contention occurs, causing the flow of large differential currents. In addition, large ground potential differences between the transceiver grounds also cause large common-mode currents to flow. To prevent the drivers from overloading and eventually experiencing thermal shut down, current limiting resistors (RS) must be placed into a driver’s output path.
  • Bus node termination: Preventing signal reflections on the line, the bus node impedance must match the characteristic impedance of the bus cable. This is accomplished with the termination resistor, RT.
  • 4-to-2 wire conversion: Resistive voltage dividers consisting of the bus resistors (RB), the driver output resistors (RD), and the receiver input impedance (RIN) extract the receive signal from the full-duplex data on the bus.

Figure 3 Three main aspects of the bus node design

Driver output parameters RO and V0

Since both drivers are always active, their output impedance (RO) and differential electro-motoric force (V0) affect the calculation of all resistor values as well as the voltage relations on the bus. The parameters are quickly determined by drawing a straight, best-fit line through the driver’s V-I characteristic, commonly provided in the transceiver data sheet. For the transceiver in Figure 4, these parameters are V0 = 4.5V and RO = V0/IO = 50Ω.

Figure 4 Determining the driver output characteristics with RO = 50Ω and VO = 4.5V

Current limiting resistors, RS

The value of RS is calculated so that at the maximum voltage difference, between the two driver outputs, their currents are limited to normal operating values. For example, if both driver outputs are of opposite polarity, the typical voltage difference between them is 3.3V. Limiting the output current to about 30mA requires a total resistance of 3.3V/30mA = 110Ω and 55Ω for each RS. Using the closest standard value available in my toolbox, each RS became 60.4 Ω.

Figure 5 Single-ended, point-to-point data link

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