Simplified kurtosis computation detects signal interference

-May 04, 2015

Kurtosis, or the fourth central moment in statistics, is commonly used to estimate the shape of the statistical distribution of a signal (or data). It is widely used for detecting non-normality in the signal received by communication receivers used in digital communication systems, passive microwave radiometry, time-series analysis, image processing, and radio astronomy, to name a few. It also finds application in detecting energy and power in certain modulation schemes and in measuring intersystem interference for communication systems. In most of the cases, Kurtosis is primarily used to detect the presence of strong man-made radio frequency interference which contaminates the distribution and makes it non-normal. Kurtosis is calculated as shown in Equation 1.


K is the kurtosis value
X is the input data
µ is the mean of the N samples considered for the computation
? represents the average

In the case of a normal (Gaussian) distribution, the Kurtosis is 3. Since we are calculating Kurtosis for a finite number of samples, the estimated value would have some uncertainty defined by the estimation error, and hence for the normal distribution, the value would be 3 ± d (the estimation error). Thus, for a given input data set to be considered normally distributed, the value of Kurtosis must lie within these limits.

Computation of Kurtosis on an FPGA or other DSP platform is computationally intensive, primarily because it needs a division operation. This Design Idea avoids the division altogether, and uses two multipliers and other blocks to determine whether the input data passes the Kurtosis test. This approach utilizes the fact that in order to check the normality of the distribution, it is only required to determine whether the Kurtosis value falls within defined limits.

The conventional method for calculating Kurtosis involves division, as shown in Equation 2.

Rewriting Equation 2 to avoid division requires two multipliers, as shown in Equation 3. The comparators are required in either case.

The elimination of the division operation leads to significant resource savings on an FPGA. In the case of an 8-bit input, the division has to be carried out on a greater-than-16-bit dividend and divisor. This is because the computation requires multiple squaring and accumulation operations, each of which leads to bit growth. The elimination of division also makes single-cycle throughput relatively simple to implement. These features make the technique amenable to integration in real-time signal processing systems, particularly for area and timing constrained designs. The block diagram for the design described by Equation 3 is as shown in Figure 1.


Figure 1  Block diagram of the design

This idea can be extended to finding abnormalities in distributions other than the normal distribution by changing the expected value of K and d if the window size changes.

The design was tested on a Xilinx FPGA by providing digital samples of an 8-bit pure Gaussian signal, a Gaussian signal with impulse interference, and a sinusoidal signal. The design was created using Xilinx System Generator and uses about 2% of the hardware resources on a Virtex-5 FPGA for 8-bit data having a window size of 1024 samples. The design has been tested up to a 250 MHz clock frequency. A design using a divider would require about 8-10% of the FPGA, and would increase the latency of the Kurtosis computation.

Figure 2
 View of the Kurtosis design made using Xilinx System Generator

Referencing Figure 2: the multiplier blocks are used as fixed point, and one inputs of each is a constant (the estimation errors). The delay added in the multiplier block is shown by the z-3 parameter, indicating three clock cycles, which is added to meet the timing requirements. The multipliers are followed by a set of comparators to check that the Kurtosis is within the prescribed limits. The comparison outputs are ANDed to get the final output. A value of ‘1’ at the output indicates that the input distribution is Gaussian, and a ‘0’ indicates otherwise.

A design file is available to download.

Although the design was tested in an FPGA-based real-time system as a detector for removal of samples corrupted by interference, it is also effective for implementing a software-based Kurtosis test.

Applications of Kurtosis computation in the field of digital signal processing and digital communication are:

  1. Removal of radio frequency interference in data received by highly sensitive communications receivers of passive microwave radiometer. Used in satellite payloads to remove pulsed interference and modulated interference from the received signal.
  2. Mitigation of radio frequency interference to improve the sensitivity of radio telescope receivers. It is useful to remove time and frequency domain impulsive interference due to power-line sparking, automobiles, communication transmitters, etc.
  3. Detection and removal of non-normality due to impulsive interference in time and spectral domain signal.
  4. Finding the statistical distribution of the received signal in digital communication receivers. This helps in testing receiver performance in the presence of interference.
  5. Energy and power detection in on-off keying based modulation, useful for certain ultra-wideband systems.
  6. Measurement of intersystem interference.


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