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EDN Access -- 02.02.95 PAL powers universal ISA bus interfac

-February 02, 1995

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Design Ideas:February 2, 1995

PAL powers universal ISA bus interface


Jerzy R Chrzaszcz,
Institute of Computer Science, Warsaw University of Technology, Nowowiejska, Warsaw, Poland

A pc board bearing the 16-bit ISA data-bus interface in Fig 1 can adapt automatically to either 8- or 16-bit motherboard slots. The interface comprises three bidirectional octal buffers and glue logic. The glue logic controls transfer direction and output enables.

The logic integrated into the PAL16L8 distinguishes between 8- and 16-bit cycles using the state of the following signals: the LSB address bit (AO), the bus-high-enable flag (SBHE), the address-enable (AEN), and I/O-access strobes (-IOR and -IOW). A single resistor across VCC and pin D18 of the ISA's secondary socket senses if the user has plugged the board into an 8- or 16-bit slot.

The PAL generates the signal -IOCS16 to indicate the ability to make 16-bit transfers. If, during a 16-bit I/O access, the board does not assert -IOCS16, the motherboard's bus controller performs an additional byte cycle, allowing the high data byte to pass via bus lines D0 through D7.

This design is only the core of the interface (note the several unused PAL pins). But, starting with it, you can develop more sophisticated functions, assert wait states, support DMA cycles, and so on. If you migrate the design to 24-pin PLDs, you could even afford an on-chip, 10-bit I/O-address decoder. (DI#1648)


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