X-Y keypad uses mC's serial por

-October 10, 1996

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X-Y keypad uses µC's serial port

James Mears, National Semiconductor, Tacoma, WA


 

 Interfacing an X-Y keypad to a microcontroller usually uses a parallel port of 8 bits or more. But with the circuit shown in Figure 1, a more efficient interface using a microcontroller's serial port reduces the number of connections required from eight to three. This interface uses the MM74C922N, a National Semiconductor keypad encoder, and two other ICs for port control and serial I/O. In addition to requiring fewer port bits, the design cuts software development and code space. This serial interfacing scheme is adaptable to several similar serial buses, such as Microwire or I2C.

  The MM74C922N, a complete scanning keypad encoder, detects and encodes contact closures in a 16-key, X-Y switch matrix. A single capacitor or external oscillator sets the scan frequency. The encoder converts and transmits the closure as a corresponding 4-bit binary code. Integrating the decoder's input voltage over an interval set by the key-bounce-mask (KBM) capacitor suppresses contact bounce. The integrator latches the key code and issues Data Available, a signal used to control external circuits connected to the data outputs. Data Available is stable until the key is released and any key bounce ceases. The data outputs are tristate, bus-oriented, and controlled by Output Enable. The encoder also features two-key rollover. This feature ensures that, when you press two keys simultaneously, the second key code does not transmit until you release the first key pressed and the key-bounce delay circuit recycles.

  In the keypad-interface design of Figure 1, the MM74C922N keypad encoder, IC1, scans the X-Y matrix keypad at approximately 600 Hz, set by the 0.1-mF capacitor, C3. The 1-mF capacitor, C4, sets the debounce period to about 10 msec. Grounding Output Enable turns on data outputs A to D. A key press, shown in the timing diagram in Figure 2, initializes the operation of the interface. The Data Available line clocks flip-flop IC3A and enables the port control CS, and shift register, IC2. IC3A also fires one-shot IC3B. The R2-C2 network, connected between IC3B's Q output and reset input, resets the flip-flop approximately RCln[VDD/(VDD-Vt+)]+tR ns, where R is in kilohms and C is in picofarads, after clocking. The pulse produced by IC3B, about 200 nsec wide with the values shown, loads the pressed key's code into shift register IC2. At the same time, shift-register bit 7 goes high and serves as a convenient key-data-ready flag to the µC. The last data shifted out clears this flag.

  The microcontroller retrieves data by setting CS low and supplying serial clock SK. Data then shifts via SO to the microcontroller's serial data (SI) input. While set, IC3A prevents reloading the shift register until all data is shifted out and the port is reset. The transaction is completed when a short pulse from network R1-C1 resets the port. Remember that the clock-enable input of the MM74C165N is, in fact, a clock input. The shift register will be clocked an additional time when CS goes high. However, this clocking presents no problem, because the data transfer has already taken place, and SK is inactive.

  You can daisy-chain the interface with other serial-data- transfer devices by using the serial-input SI of IC2 as a serial data-input port. You can easily add an interrupt function by interfacing either Data Available or IC3's Q output to the controller's interrupt line with an open-collector (or -drain) transistor. (DI #1932)


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