Advertisement
Advertisement

EDN -- 10.27.94 Single gate synchronizes cloc

-October 27, 1994

EDN logo

Design Ideas:October 27, 1994

Single gate synchronizes clock


Phil Harvey,
Technology Integration Inc.,
Bedford, MA


The deceptively simple circuit in Fig 1 harbors formidable power. Consider when you have a data-clock input to your system for an existing serial data stream. Then, your system people surprise you with a new serial data source after your real-estate budget is used up. You can synchronize the new signal to the clock and assign the data to an unused input bit without unduly burdening your software engineers. But, if the gadget that supplies the data clock goes haywire, your new signal dies with it; that is, unless you supply the clock and synchronize it to the functioning existing clock by using a spare inverter.

With its input grounded, a single inverter becomes the familiar relaxation oscillator and generates a square wave. However, a clock driving the input at about the same rate reproduces itself (inverted) with only CMOS propagation delays. An additional inverter at either end restores the phase. The frequency margin over which you can assure synchronization is much wider than the expected variation in free-running frequency. The margin is wide because the free-running oscillator's input pingpongs between the two Schmitt-trigger thresholds, typically 1 Vp-p. The CMOS drive levels of 5 Vp-p provide so much overdrive that, if signals were nicely symmetrical, synchronism is assured down to one-fifth of the free-running frequency. Unfortunately, you can't be sure of such symmetry, but a factor of two is safe. The free-running rate is not terribly accurate, but high accuracy is not always needed just to keep the data flowing.

If the feedback resistor R is large, any normal, low source impedance is a practical short circuit when the input signal dies. In particular, if the input voltage goes to the positive rail, it's also a short circuit. If you use this circuit, don't forget to protect the input from external transients, opens, and shorts. (DI # 1606)


| EDN Access | feedback | subscribe to EDN! |
| design features | design ideas | columnist |

Copyright c 1996 EDN Magazine. EDN is a registered trademark of Reed Properties Inc, used under license.

Loading comments...

Write a Comment

To comment please Log In

FEATURED RESOURCES