# Miller Compensation and the RHPZ

For all its advantages, negative feedback poses a risk, namely, oscillation (this is why the engineering community didn’t immediately embrace this revolutionary concept when Harold Black conceived it, in 1928). To stave off possible oscillations, a circuit must be provided with a sufficient phase margin *f _{m}*. As depicted in Figure 9 of Ref. [1] for the case of a second-order system, the frequency response exhibits

*peaking*for

*f*

_{m}__<__65°, and the transient response exhibits

*ringing*for

*f*

_{m}__<__75°. The smaller

*f*, the larger the amount of peaking and ringing. For

_{m}*f*

_{m}__<__0° the circuit becomes oscillatory. As an example, the feedback-bias transistor of Figure 2 of Ref. [1] has

*? 86°, which is considered to be a good phase margin.*

*f*_{m}If a circuit does not enjoy enough phase margin, we need to reshape the frequency profile of its loop gain *T*(*jf*) in such a way as to raise * f_{m}* to the desired level - a task known as

*frequency compensation*. Depending on the application, popular phase-margin specifications are

*= 90°, 75°, 60°, and at times even 45°. Since*

*f*_{m}*T*(

*jf*) =

*a*(

*jf*)x

*ß*(

*jf*), reshaping

*T*(

*jf*) requires reshaping the open-loop gain

*a*(

*jf*), or the feedback factor

*ß*(

*jf*), or both. In Ref. [2] we have taken the viewpoint of the IC

*user*, who stabilizes a circuit by reshaping

*(*

*ß**jf*) for a given

*a*(

*jf*). In the current blog we take the viewpoint of the IC

*designer*, who reshapes

*a*(

*jf*) so as to ensure a prescribed

*for a given range of*

*f*_{m}_{}*s, typically for frequency-independent feedback with*

*ß**ß*

__<__

*ß*_{max}. Most op amps are compensated for

*ß*_{max}= 1, in which case

*T*(

*jf*) =

*(*

*a**jf*)x1 =

*a*(

*jf*), so

*T*(

*jf*) now coincides with

*a*(

*jf*). However, some op amps are compensated for

*ß*

_{max}< 1, such as

*ß*

_{max}= 0.2, this being the reason why they are said to be

*decompensated*.

Based on the transistor example of Figure 2 of Ref. [1], it is reasonable to assume that the response of each gain stage of an amplifier be dominated by a single pole, which can erode

*by as much as 90°. Consequently, in, say, a two-stage amplifier, we may have a phase erosion by as much as 2 x 90° = 180°, making*

*f*_{m}*approach zero. (In practice, because of additional high-frequency poles,*

*f*_{m}*may actually be even negative). The most popular frequency-compensation technique is to lower one of the poles so as to make it*

*f*_{m}*dominate*

*(*

*a**jf*) over the entire frequency range of interest. This form of compensation aims toward the idealized response depicted in

**Figure 1a**, which we express mathematically as

where *a*_{0} is the *dc gain* and *f*_{1} is the *pole frequency*. We observe that at high frequencies we have

**Figure 1** (*a*) Single-pole response, and (*b*) two-pole response with a dominant pole frequency at *f*_{1} and a second pole frequency at locations giving, respectively, *f_{m}* = 45°, 60°, and 75°.

indicating that above *f*_{1}, the *gain-bandwidth product*, defined as GBP = |*a*|x*f*, is

Moreover, the frequency *f _{t}* at which |

*a*| drops to unity, or 0 dB, is such that GBP = 1

*x f*, or

_{t}Since we are assuming * ß* = 1, we rephrase the phase margin as

In **Figure 1a** we have ph *a*(*jf _{t}*) = –90°, so

*= 180 – 90 = 90°.*

*f*_{m}As it approaches the transition frequency *f _{t}*, the response of a real-life op amp deviates somewhat from the idealized response of

**Figure 1a**due to the presence of additional high-frequency poles (and possibly zeros). This is exemplified by the popular 741 op amp of

**Figure 2**, which has GBP = 1 MHz, but for which cursor measurements give

*f*= 0.888 MHz (< GBP), and

_{t}*= ph*

*f*_{t}*a*(

*jf*) = –117° (< –90°), so

_{t}*= 180 – 117 = 63° (< 90°). Assuming that the additional phase shift of –27° can be ascribed to a*

*f*_{m}*single*high-frequency pole

*f*

_{2}, we readily calculate

*f*

_{2}by imposing –27° = –tan

^{–1}(0.888/

*f*

_{2}), which gives

*f*

_{2}= 1.743 MHz. As we proceed, we will find it useful to know the position of this second pole for a given

*, in the manner depicted in*

*f*_{m}**Figure 2b**. The results are summarized as follows:

**Figure 2 **Using PSpice to plot the open-loop gain of the 741 op amp (*V _{CC}* = –

*V*= 10 V.)

_{EE}It is also useful to keep in mind the following:

**Miller Compensation **

A pole is made dominant by deliberately adding capacitance to the internal node responsible for that pole. Anticipating a low-valued pole frequency (such as 5 Hz for the 741), we expect the added capacitance to be fairly large. Miller compensation exploits the Miller effect (see the Appendix) to simulate a *large *capacitance using a physically *small* capacitor *C _{c}* that can easily be fabricated on chip without wasting precious area. This form of compensation is depicted in

**Figure 3**for the case of a capacitively loaded CMOS amplifier.

**Figure 4**shows the high-frequency model, which includes also the transistors’ stray capacitances

*C*

_{1}through

*C*

_{4}. These capacitances are usually much smaller than

*C*and

_{c}*C*, so to help develop a basic feel for circuit operation, let us ignore

_{L}*C*

_{1}through

*C*

_{4}for the time being.

**Figure 3 **AC model of a Miller-compensated, capacitively-loaded two-stage CMOS amplifier.

We observe that the nodes labeled as *V*_{1} and *V _{o}* establish two poles in the left half-plane (LHPPs). Moreover, as discussed in the Appendix, the transmission capacitance

*C*establishes a zero in the right half-plane (RHPZ). We therefore anticipate a gain expression of the type

_{c}where *a*_{0} is the dc gain, *f*_{0} is the RHP zero frequency, and *f*_{1} and *f*_{2} are the LHP pole frequencies.

**Figure 4 **High-frequency model of the two-stage amplifier of Figure 3.

Let us use physical insight to develop expressions for each parameter. At dc all capacitors act as open circuits, so we have two inverting stages with dc gains of *a*_{10} = –*g _{m}*

_{1}

*R*

_{1}and

*a*

_{20}= –

*g*

_{m}_{2}

*R*

_{2}, respectively. The overall dc gain is thus

*a*

_{0}=

*a*

_{10}x

*a*

_{20}, or

Based on Equation (A1) of the Appendix, the pole frequency associated with node *V*_{1} is

**Figure 3**, we can say that at sufficiently high frequencies,

*C*forms an ac short between

_{c}*M*

_{2}’s drain and source terminals, making

*M*

_{2}operate in the diode mode, where it exhibits a resistance of about 1/

*g*

_{m}_{2}. Together with

*C*, this resistance forms the second pole, whose frequency is thus

_{L}The magnitude and phase angle of the gain of Equation (6) are, respectively,

Note that unlike a LHPZ, a RHPZ contributes

*phase lag*, just like the LHPPs

*f*

_{1}and

*f*

_{2}.

**Figure 5**shows a possible frequency profile of the gain of Equation (6). Using Equations (7) and (9) we have, for

*g*

_{m}_{2}

*R*

_{2}>> 1,

**Figure 5**Possible Bode plot for the circuit of Figure 4.

**The Much Dreaded RHPZ **

Depending on the location of *f*_{0} relative to that of *f*_{2}, we have some interesting situations. To help better visualize things, use the following insightful expressions, which you can easily derive from the above equations,

Consider first the case *g _{m}*

_{2}>>

*g*

_{m}_{1}, which is typical of bipolar op amps (for instance, in the 741 op amp,

*g*

_{m}_{2}is more than 30 times greater than

*g*

_{m}_{1}). Anticipating

*f*~ GBP, we expect

_{t}*f*

_{0}(>>

*f*) to have negligible effect upon ph

_{t}*a*(

*jf*). So, if you want to design for, say,

_{t}*= 75° for a given*

*f*_{m}_{}*C*, ignore

_{L}*f*

_{0}and adapt Equation (5

*a*) to impose

Then, once you know GBP, use Equation (12) to calculate the required compensation capacitance as

What if the condition *g _{m}*

_{2}>>

*g*

_{m}_{1}does not hold? This is the case of two-stage CMOS op amps, which typically have

*g*

_{m}_{2}? 2

*g*

_{m}_{1}. The RHPZ is now close enough to GBP to have an appreciable impact upon

*. Assuming again*

*f*_{m}*f*~ GBP, the RHPZ will erode

_{t}*by tan*

*f*_{m}^{–1}(

*f*/

_{t}*f*

_{0}) ? tan

^{–1}(1/2) = 26.5°.

A rather interesting phenomenon occurs if we let

*C*=

_{c}*C*to make

_{L}*f*

_{0}

*coincide*with

*f*

_{2}, by Equation (13

*b*). Then, the numerator term involving

*f*

_{0}in Equation (11

*a*) will

*cancel*out the denominator term involving

*f*

_{2}, leaving only the term involving

*f*

_{1}, thus giving the

*false*impression of a single-pole system. However, looking at Equation (11

*b*), we note that the combined phase delay due to

*f*

_{0}and

*f*

_{2}is

*twice*that due to

*f*

_{2}alone!

Needless to say, unless it is sufficiently high, a RHPZ is very unwelcome, and the best way to deal with it is to eliminate it altogether. But how? To answer, we need to take a closer look at what is going on physically in the circuit. To this end, consider the current through *C _{c}*, assumed to flow from left to right in

**Figure 6**. This current is given by (

*V*

_{1}–

*V*)/(1/

_{o}*j*2

*pfC*), or (

_{c}*V*

_{1}–

*V*)x(

_{o}*j*2

*pfC*), and as such it can be decomposed into a

_{c}*forward*component

*I*(

_{f}*jf*) and a

*reverse*component

*I*(

_{r}*jf*),

*I _{f}*(

*jf*) =

*j*2

*p*

*fC*

_{c}V_{1 }

*I*(

_{r}*jf*) =

*j*2

*p*

*fC*

_{c}V_{o}The *reverse* component *I _{r}* is responsible for making

*C*appear magnified by the Miller effect when

_{c}**Figure 6 **Decomposing the current through *C _{c}* into a forward and a reverse component.

reflected to node *V*_{1}, so it is *desirable* because it helps establish the dominant pole. By contrast, the forward component *I _{f}* is

*undesirable*because it is responsible for the RHP transmission zero. The best way to cope with this zero is to block the transmission of

*I*to the output node

_{f}*V*while retaining the current

_{o}*I*into node

_{r}*V*

_{1}. Good candidates for this task are voltage/current buffers because of their inherent

*unidirectionality*.

**Figure 7** Using the unity-gain voltage buffer E to block transmission to the output node *V _{o}*.

**Figure 7**interposes a unity-gain

*voltage buffer*(E) between

*C*and node

_{c}*V*(input from

_{o}*V*, output to

_{o}*C*), to supply

_{c}*C*(and, hence, node

_{c}*V*

_{1}) with

*I*while shunting

_{r}*I*to ac ground. An alternative is to interpose a unity-gain

_{f}*current buffer*between node

*V*

_{1}and

*C*(input from

_{c}*C*, output to

_{c}*V*

_{1}), which will again supply

*V*

_{1}with

*I*while inhibiting

_{r}*I*with its high output impedance. (In a CMOS op amp, the buffers are implemented, respectively, with a common-drain and a common-gate MOSFET). With forward transmission out of the way, we are essentially left with a two-pole system that we can stabilize in the manner exemplified by Equation (13). Thus, for

_{f}*= 75°, we calculate*

*f*_{m}**Figure 8** Bode plots for the circuit of Figure 7 (#1 traces). Also shown are the plots in the absence of the voltage buffer E, that is, with node *V _{o}* tied directly to

*C*(#2 traces).

_{c}

**Figure 9** A frequency-compensated two-stage CMOS op amp [3].

(If a different *f _{m}* is desired, replace the 3.605 term in accordance with Equation (5); for instance, for

*= 60°, replace 3.605 with 1.5 and get*

*f*_{m}*C*= 0.75 pF.) The results of the simulation, shown in

_{c}**Figure 8**(#1 traces) reveal

*f*= 42 MHz and

_{t}*= –104.6°, so*

*f*_{t}*= 75.4°. Without the buffer (#2 traces) the circuit gives*

*f*_{m}*f*= 47 MHz and

_{t}*= –134°, so*

*f*_{t}*= 46°, which would result in appreciable peaking and ringing.*

*f*_{m}*R*in series with

_{c}*C*, as discussed in the Appendix. This is exemplified [3] in

_{c}**Figure 9**for the case of a two-stage CMOS op amp. Here,

*M*

_{1}through

*M*

_{4}form the first stage, and

*M*

_{5}forms the second stage, with

*g*

_{m}_{5}= 0.9344 mA/V.

**Figure 10** Bode plots for the circuit of Fig. 9 (#1 traces). Also shown are the cases *R _{c}* = 0 (#2 traces) and

*R*=

_{c}*C*= 0 (#3 traces).

_{c}Letting *R _{c}* = 1/

*g*

_{m}_{5}= 1/0.9344 = 1.07 kO yields

*f*

_{0}? 8, after which we can tweak with the calculated value of

*C*until we get the desired

_{c}*. The results, shown in Figure 10 (#1 traces) reveal GBP = 33 MHz,*

*f*_{m}*f*= 32.0 MHz, and

_{t}*= –105°, so*

*f*_{t}*= 75°. With*

*f*_{m}*R*= 0 (#2 traces) the circuit would give

_{c}*f*= 35.1 MHz and

_{t}*= –131.4°, or*

*f*_{t}*= 48.6°, indicating that the presence of*

*f*_{m}*R*improves

_{c}*by 75 – 48.6 = 26.4°.*

*f*_{m}Figure 10 shows also the uncompensated response (#3 traces), which has *f _{t}* = 361 MHz and

*= –183.6°, so*

*f*_{t}*= –3.6°! This response is due to the internal parasitics of the various transistors, which SPICE calculates automatically based on process parameters and device geometries. It is apparent that the compensated response is dominated by*

*f*_{m}*C*and

_{c}*C*, thus justifying our earlier decision to ignore the parasitics. In practice, one would first ignore the parasitics to come up with an initial estimate for

_{L}*C*, and then tweak with the value of

_{c}*C*(and possibly

_{c}*R*) until the desired phase margin is achieved. We also see a notorious consequence of frequency compensation, namely, a drastic reduction of the open-loop bandwidth compared to the uncompensated case. But, this is the price we must pay for stability!

_{c}**Appendix**

Placing a capacitor *C _{c}* in the feedback path of an inverting amplifier has two effects: (1) an increase in the apparent value of

*C*as seen from the input (

_{c}*Miller effect*), and (2) the creation of a positive transmission zero (

*right half-plane zero*or RHPZ).

**Figure A1** Illustrating the Miller effect.

To illustrate the Miller effect, refer to **Figure A1**, where we find the input impedance *Z _{eq}* as

indicating that *C _{c}*, as seen from the input node, appears magnified by the factor 1 +

*g*

_{m}_{2}

*R*

_{2}. We justify this physically [3] as follows. Consider first the circuit of

**Figure A2a**, where we see that a 0-to-1 mV voltage change results in a charge transfer of ?

*Q*=?

*V*/

*C*= (1 mV)/(1 pF) = 1 fC. If we place the same

_{c}*C*in the feedback path of an inverting amplifier with a gain of –99 V/V as in

_{c}**Fig. A2b**, the voltage change experienced by

*C*is now ?

_{c}*V*= [1 – (–99)] = 100 mV, so we now have ?

*Q*= ?V/

*C*= (100 mV)/(1 pF) = 100 fC. The change transfer in (

_{c}*b*) is 100 times as large as in (

*a*), indicating that seen from the input node, the capacitor-amplifier combination provides an equivalent capacitance 100 times as large, even though physically we still have only a 1-pF capacitor. This capacitance transformation proves extremely useful when we need to establish a low-frequency pole using a large equivalent capacitance, and yet we want to retain the slew-rate advantages of using a small physical capacitor.

**Figure A2** Intuitive illustration of the Miller effect.

To illustrate the RHPZ, refer to

**Figure A3a**, and consider the gain

*a*

_{2}=

*V*/

_{o}*V*

_{1}. At low frequencies, where

*C*acts as an open circuit, we have

_{c}*a*

_{2}? –

*g*

_{m}_{2}

*R*

_{2}(inverting amplifier). At high frequencies, where

*C*acts as a short, we have

_{c}*a*

_{2}? + 1 V/V (noninverting amplifier). Clearly, a frequency

*f*

_{0}must exist at which gain changes polarity, or

*a*

_{2}(

*jf*

_{0}) = 0. At this frequency we must have

*V*(

_{o}*jf*

_{0}) = 0, indicating that the current

*I*sourced by

*C*must be sunk entirely by the dependent source. Imposing

_{c}and solving for *s*_{0}, aptly called the *s-plane zero*, we obtain

indicating that this zero lies in the right-half of the complex plane, or RHPZ. (For a discussion of RHPZ peculiarities, see Ref. [4].)

Consider now the effect of placing a resistance *R _{c}* in series with

*C*. At the zero frequency we now have the situation depicted in A3

_{c}*b*, where

so the *s-plane zero* is now

It is apparent that the presence of *R _{c}* gives us the ability to relocate

*s*

_{0}to a less harmful position of the frequency spectrum. In particular, making

*R*= 1/

_{c}*g*

_{m}_{2}relocates

*s*

_{0}to infinity, and making

*R*> 1/

_{c}*g*

_{m}_{2}moves

*s*

_{0}to the left half-plane, thus turning the RHPZ into a LHPZ! The resistance

*R*is usually the channel of a MOSFET biased in the ohmic region.

_{c}**Figure A3** Circuits to investigate the RHP zero.

**References**

- Loop gain measurements
- Feedback and Impedances
- Analog Circuit Design: Discrete & Integrated, Sergio Franco, San Francisco State University
- Demystifying the RHPZ

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