Accurate AMI Analysis – Whose Responsibility Is It?

Donald Telian, AMI Panel Moderator and Signal Integrity Consultant -January 07, 2016

All parties must learn how to quickly sanity check an AMI model by performing tests such as isolating and sweeping through the transfer functions of available CTLE curves.

AMI (algorithmic modeling interface) is a hot topic at DesignCon. As availability and usage of AMI models and simulators continues to increase, more and more design decisions are guided by AMI analysis. Yet how meaningful – or, more specifically, how accurate – are the results from such analysis?
This year’s AMI panel “Accurate AMI Analysis – Whose Responsibility Is It?” combines industry experts from various disciplines to discuss to what extent AMI analysis can be trusted, what can be done to improve deficiencies, and who might be responsible for those improvements.  As such, the panel includes IC vendors (model makers), Systems designers (model users), and EDA tool vendors (simulation environment) to ensure the question is examined from all perspectives.  Each will present the problem as they see it, what they are willing to provide, and what they need from others for a complete solution to emerge.  The goal is to ensure the panel is well-rounded, not slanted towards any one particular discipline’s perspective, and viable solutions are proposed.

In any discussion about simulation accuracy, the old adage applies:  “garbage in, garbage out”.  As such, one focus of the panel is AMI model quality.  Are models being developed correctly? And, are they correlated to silicon when it becomes available?  While we might be inclined to place the burden of model quality entirely on the silicon vendor (model maker), the systems designer and EDA vendor must also work towards model quality.  Specifically, EDA vendors are including automated AMI model checking and validation, just as they have done for S-parameter and legacy IBIS models.  The panel discusses what processes and automation exist, and what we might expect to see in the coming year(s).  The system designers must validate AMI models within their unique context and design application, as well as provide the impetus for the IC vendor to deliver quality models on-time.  Furthermore, all parties must learn how to quickly sanity check an AMI model by performing tests such as isolating and sweeping through the transfer functions of available CTLE curves.  Panelists were chosen who have shown leadership in driving model quality – even when it could have arguably been someone else’s responsibility – and also have correlation processes and data they can share.

This panel augments the increasing interest in and number of papers on AMI, and continues the discussion from last year’s AMI panel when experts from all facets of the modeling and simulation challenge focused on the question:  “Can we use AMI analysis to predict meaningful BERs?”  This year’s panel will again draw every engineer into solving relevant problems through collaboration, as modeled by industry experts on the dais.  

About the Author
Donald Telian moderates a yearly AMI Panel at DesignCon, providing industry-wide collaboration on the current challenges facing AMI modeling and analysis.  Donald is a Signal Integrity Consultant with over 30 years of experience in the field, and has been an active contributor at DesignCon since it began.  He can be reached at

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Want to learn more? Attend DesignCon 2016, the premier conference for chip, board, and systems design engineers. Taking place January 19-21, 2016, at the Santa Clara Convention Center, DesignCon will feature technical paper sessions, tutorials, industry panels, product demos, and exhibits. Register here.
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