Best of the Web: September 21st 2012

-September 21, 2012

What had become a popular feature on the EDA Designline has now become something that I will be doing in my blog on EDN. Same consolidated view of the best things that other people have written on the web over the past week that are about EDA and IP, with an emphasis on the interesting and technical rather than on products and marketing. Please let me know if you have something you would like to see included. I have also added a section about blogs within the UBM family as well so that the list is more complete.

My favorite for the week is:
Mike Cassidy of the Mercury News wrote Don't tell teenager Shachi Kakkar that chip verification is for nerds. This is such a delightful story and an inspiration to many.

From within the network:
Duane Benson writes in All Programmable Planet - Discovering FPGAs: Creating a Logic Analyzer

Steve Schulz writes in the EDA Designline - Collaborative Advantage: The Future of Fabless Design?

And some other great entries include
Mike Jensen of Mentor writes “Do We Overdesign?” in which he talks about his love of simplicity in cars, phones and other cool stuff.

Alan Sguigna of ASSET Intertech writes “Problems with Powered Opens on ICT” and tells you how to minimize the problems.

Gaurav Jalan posted on siddhakarana “Communicating BUGS or BUGgy Communication” in which the virtues of good communications about bugs are discussed.

Pradeep Chakraborty talked to “Dr. Wally Rhines on global EDA industry” about numbers, new technology nodes and other issues.

Cadence’s Richard Goering reports on the MemCon Keynote: Cloud, Mobility Disrupt Semiconductor Memory Ecosystem given by Martin Lund

and the keynote “Why Hybrid Memory Cube Will “Revolutionize” System Memory” given by Scott Graham of Micron.

Sean Murphy provides a checklist for startups to evaluate where they are in “Consider What’s Changed And What You Bring To An Opportunity

 Jack Erickson of Cadence opines about “iPhone5 Differentiation is Chip Design” and suggests we could see a hardware design renaissance enabled by high-level synthesis.

Vikas Grover of AMD talks about a VCS feature that provides a new TLI adaptor enabling UVM TLM 2.0 sockets to communicate with SC TLM 2.0 based environment to pass transactions across language domains.

Brian Bailey – keeping you covered

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