Testing bulk cable is not so easy

-October 27, 2016


Testing cable assemblies for signal integrity usually requires connecting the cable assembly under test to a TDR (time-domain reflectometer) or to a VNA (vector-network analyzer) through some kind of test fixture. That process is well known and documented, but how do you characterize the bare cable before it's cut and attached to connectors?

Engineers at Harting solved the problem by developing a fixture that connects to bare cable and then to test cables and equipment. But, they ran into problems along the way. In a paper presented at EDICON 2016 in Boston, Harting's Markus Witte and Keysight's Mike Resso explained the problem and the solution.

To properly characterize a 50 Ω cable, you need to maintain its nominal impedance. Then, you have to de-embed any added connections to measure the bulk-cable's properties. Given that every cable needs at least two conductors, the bulk cable's nominal impedance becomes 100 Ω. Harting engineers found that simply soldering, taping, and shielding the bulk cable to a traditional semi-rigid coax was not only impractical, but it resulted in an impedance mismatch.

The fixture that Harting engineers developed (Figure 1) uses an impedance-matched PCB to connect the bulk cable to connectors that then attach to the test equipment. The PCB includes gold-plated contacts for the cable's drain wire, providing a short return path to minimize losses and EMI. Figure 2 provides a look inside the assembly where you can see the PCB material. Because of the impedance match, it's possible to achieve the nominal 100 Ω impedance within ±2%.

Figure 1 This assembly lets engineers attached bulk cable to test equipment for testing.


Figure 2 An impedance-matched PCB provides an electrical path from the cable under test to the output connectors.

During the presentation, Eric Bogatin asked about the waves of surface current on the PCB (Figure 3). "You have coplanar microstrips, a top ground-fill, a bottom ground fill, and via stitching all around the edges. Is the surface current shown in blue low enough to ignore?" Witte replied that the current shown in blue is indeed low enough to ignore. Thus, nearly all of the return current is in close proximity to the traces.

Figure 3 This simulation shows the surface current on the impedance-matched PCB licated in the fixture. Note the via stitching surrounding the microstrips.

Because soldering the bulk cable to the PCB isn't practical, Harting engineers designed a compression mechanism to press the bare wire to the PCB and it prevent the cable from moving during a test.

As with any fixture, you have to de-embed it to remove its effects from the measurement. AFR (automatic fixture removal) software in a VNA or in a PC let Harting engineers characterize the PCB using an open circuit. Resso explained that you measure S11 for a single-ended line or SDD11 for a differential line and the software calculates S22, S21, and S12. From that data, the fixture's effects can be removed from the measurement.

The fixture applies pressure to the stripped ends of the bulk cable, compressing the bare wire to the PCB. At first, engineers used rubber to apply compression, but that caused an impedance mismatch. "We had to try many different materials," noted Witte. "When we found one that worked, we asked a manufacturer to make it to our specifications." Figure 4 shows some sample parts.

Figure 4 Harting uses these parts as part of the signal launch were to bare wire meets the impedance-matched PCB in Fig. 2.

Witte also noted that impedances of the PCB could vary by as much of ±10%. "We wanted a tolerance of ±2%," he said. "Even the thickness of the gold pads made a difference. We had to design for consistent impedance and specify how to make the PCB to keep it under control."

The presentation then moved on to testing, where Witte showed results for impedance and for S-parameters that measures SDD21 (differential insertion loss), SDD11 (differential return loss), differential-to-common-mode conversion (SCD21) and common signal return loss (SCC11). Figure 5 shows the SDD21 result using AFR. As you can see, the impedance is flat. Figure 6, from the show floor, shows two of the fixtures connected to the bare cable and the cable assemblies that go to the VNA.

Figure 5 Measurement of SDD21 (differential insertion loss) shows a flat response over the frequency range of 50 MHz to 40 GHz. Source: Harting and EDICON.

Harting engineers will continue to develop this technology. They plan to present a paper showing further work at DesignCon 2017.

Figure 6 In the Keysight booth at EDICON, two Harting fixtures adapt the bare cable under test (the loop) to pairs of cables that connect to a VNA.

Martin Rowe, Senior Technical Editor Circle me on Google+ Follow me on TwitterVisit my LinkedIn page

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