09.11.98  Design Idea

-September 11, 1998

 


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September 11, 1998

Simple µC acts as dedicated motor controlDylan Horvath, Gecko Sysytems Inc, Austin, TX
Motion-control systems often use a PWM signal to control the duty cycle for a motor driver or amplifier module. Typical designs generate the PWM signals using µCs with dedicated PWM output lines, such as the PIC16C65 (Microchip Technology, www.microchip.com) and the HC11 (Motorola Inc, www.motorola.com). However, these µCs may have more features than necessary for a motion-control system with multiple degrees of freedom. Using this type of µC on each degree of freedom becomes costly, particularly if all you need to do is generate motor-control signals.

An alternative approach uses one low-cost µC, in this case the PIC16C84, as a dedicated motor-control register (Figure 1). The circuit accepts control words from an 8-bit digital bus, and the chip-select line triggers the µC, much the same as other standard 8-bit hardware. You can arrange multiple µCs on a bus and communicate with a higher level motion-control computer or µC. For example, you can use the parallel port of a PC to control all the degrees of freedom on a robot arm. By using PWM signals to modulate the speed at each joint, coordinated motion is possible.

The RA3 and RB1-to-RB7 data-bus lines are digital inputs that connect to an output-controlled data bus. The PIC16C84 ignores these inputs until there is a high-to-low transition on Pin 6 (RB0/INT). On this transition, the µC places the state of RA3 on the output RA0 (direction bit) and places the state of RB1 on RA1. The state of the remaining lines, RB2 to RB7, set the pulse width of the PWM output, RA2. Note that these outputs are subject to special conditions.

The RB0/INT digital input latches the word on the 8-bit data bus. A 74HC138 1-of-8 device selector drives this active-low input. The high-to-low transition generates an interrupt to update the state of the register. At all other times, the circuit ignores the state of the 8-bit data bus.

RA0 drives the motor-drive chip and determines the polarity of the current going through the motor in the output stage of the driver. RA1 also drives the motor-drive chip. When RA1 is high and RA2 is high, active braking of the motor occurs. When RA1 is high and RA2 is low, the motor coasts to a stop.

The RA2 PWM output has a duty cycle that depends on the binary word on the inputs during a high-to-low transition on RB0/INT. The duty cycle of this signal increases from 1.56 to 100% in increments of 1.56%. In other words, the duty cycle goes from 1/64 to 64/64 in increments of 1/64, depending on the binary word on RB2 to RB7. The duty cycle repeats at a rate of approximately 300 Hz.

Figure 2 shows the output lines from the motor-control register when you load the values from Table 1 into the register. During the power-up configuration, the direction, brake, and PWM lines are high. Then, loading the value ($FD) turns off the brake and sets the PWM line at 100% duty cycle (maximum speed). Loading $C8 switches the direction of the motor and reduces the duty cycle to 80%. The next two values ($7C) and ($60) maintain the direction of the motor but reduce its duty cycles to 50% and 20, respectively.

There is a lag between the time the enable line goes active low and the time the µC code can read the value on the data bus. When the enable line triggers an interrupt signal, the µC must save the program counter and the state of its internal registers before the µC can process the interrupt. This delay causes a problem if the value on the data bus changes by the time the PIC µC samples it. You can solve this problem by using a latch to store the value on the data bus long enough for the PIC µC to see it.

To download the corresponding assembly code, click here. (DI #2239)
Table 1—Example motor-control-register values
Pulse-width-setting bitsBRK,DIR
D7D6D5D4D3D2D1D0HEXDescription
xXxxxX1x--Brake on, motor does not turn
11111101$FDMotor turns clockwise, 100% duty cycle
11001000$C8Motor turns counterclockwise, ~80% duty cycle
01111100$7CMotor turns counterclockwise, ~50% duty cycle
01100000$60Motor turns counterclockwise, ~20% duty cycle

Make a low-cost benchtop power meterJim Todsen, Burr-Brown Corp, Tucson, AZ
With a few inexpensive ICs and passive components, you can easily make a multirange power meter suitable for use on your benchtop. The circuit in Figure 1 measures currents from microamps to amps and voltages as high as 100V. The voltage at VOUT, which you can monitor with a DVM, indicates the load's power. Two 9V batteries can run the circuit (±V=±9V), which has a current drain of 10 mA.

The circuit performs an analog multiplication of current and voltage to calculate the power. The load that you want to measure connects between +OUT and -OUT. The supply to the load connects between +IN and -IN. The PGA amplifier (IC1) produces a voltage proportional to the load current (ILOAD) sensed across RSENSE, which sits on the ground side of the supply. R1, R2, and IC3D generate a scaled version of the load voltage equal to VLOAD/20. The output of IC1 and VLOAD/20 are the inputs to IC2's precision analog multiplier. IC2 has a built-in scale factor of 1/10. R4, R5, and R6 provide additional gain. A lowpass filter at the output helps reduce noise and provides protection to IC2 in case VOUT accidentally shorts to ground. Combining all the scaling factors gives

19dieq1.gif (2495 bytes)

The circuit works equally well for positive and negative load currents and voltages. If the load is producing rather than dissipating power, VOUT reads negative. The scale of VOUT is the same for positive and negative power readings. Table 1 shows the ranges.
Table 1—Power meter ranges and settings
S0S1PGA GAINIMAXVMAXPMAXVOUTscale
OpenOpen100010 mA100V50 mW10 mW/W
ClosedOpen100100 mA100V500mW100 mW/W
OpenClosed101A100V5W1 W/W
ClosedClosed110A (see note)100V50W10 W/W
Note: IMAX may be lower, depending on the rating of RSENSE.

The maximum load-current setting (IMAX) limits the output of IC1 to 5V to meet head-room requirements when using 9V supplies. D1 through D5, R3, and an LED provide a positive-current-overload warning. When the LED turns on, you should decrease the PGA's gain. A similar string of diodes with opposite polarity can monitor negative-current overloads. Make sure RSENSE has a sufficient rating to handle the maximum current you use. Also, remember that for high ILOAD, there is a significant voltage drop across RSENSE.

The maximum load voltage (VMAX) of this circuit is 100V, limiting the voltage at IC2's input to 5V. You can adjust the ratio of R1 and R2 for a different VMAX. Keep the sizes of R1 and R2 large to minimize current through them. Their currents add to ILOAD and cause an error in the power reading. IC3D prevents IC2's input-bias current from flowing through R1 and R2. The maximum power (PMAX) setting limits IC2's output to 5V.

IC3A through IC3C, IC4A and IC4B, and potentiometers R7 through R10 provide offset cancellation. R6 provides gain calibration. The circuit must remove various offsets and gain errors to achieve the best accuracy, which is better than 1/2% of full-scale over most of the ranges. If lower accuracy is acceptable, you can remove some or all of the offset cancellation circuitry. To fully calibrate the circuit:

 1. Short the load (place a short between +OUT and -OUT) with VIN=0. Adjust R10 until VOUT=0, which nulls the offset of the output of IC2.

 2. Remove the short, set PGA=1, and apply a large VIN with no load. Adjust R7 until VOUT=0, which nulls the offset of the ILOAD input to IC2.

 3. Set PGA=1000 and continue applying VIN with no load. Adjust R8 until VOUT=0, which nulls the offset of the front end of IC1. If the PGA gain remains the same, R8 is unnecessary because R7 cancels the offset.

 4. Short the load. Apply VIN, and increase ILOAD until the LED starts to turn on. (For PGA=1000, ILOAD is 10 mA to turn on LED.) Adjust R9 until VOUT=0, which nulls the offset of the VLOAD input to IC2.

 5. Finally, calibrate the gain. Set the PGA=100, the load=2k, and VLOAD=25V. Adjust R6 until VOUT matches the calculated power.(DI #2250)

Low-battery voltage cutoff consumes just 1 mAYongping Xia, Teldata Inc, Los Angeles, CA
A low-battery voltage-cutoff circuit prevents overdischarge of a rechargeable battery. An obvious requirement of this circuit is extremely low power consumption. Figure 1a's simple circuit has a measured current consumption of approximately 1.2 mA and uses only two components to perform the low-battery cutoff function for a four-NiCd battery.

IC1 is a 3.9V voltage detector with a maximum hysteresis of 0.3V. When the battery is charged, the 5V power supply exceeds this IC's threshold such that its output goes high to turn on Q1, an IRLZ14 MOSFET switch. The IRLZ14 is a logic-level device with an on-resistance of 0.2 Ohm. When the battery voltage drops to below IC1's threshold, the output of IC1 is zero, which turns off Q1.

If the load is heavy, the circuit may turn on and off when the battery voltage reaches the threshold. When the circuit cuts off the load, the battery voltage rises again; this higher voltage may exceed IC1's turn-on threshold. To prevent this problem, the circuit in Figure 1b uses a flip-flop to provide a clean cutoff. Pushing S1 turns on the switch. When the load has a large capacitance, R1 and C1 provide a delayed response to prevent the turn-on in-rush current from triggering the circuit. The power consumption of this circuit is in the same range as that of the circuit pictured in Figure 1a.

All the parts for this idea are available from Digi-Key (www.digi-key.com). For a lower switch resistance, you can use the IRLZ44, which has an on-resistance of 0.022 Ohm.

(DI #2253)

High-voltage circuit breaker protects to 26VTed Salazar, Maxim Integrated Products, Sunnyvale, CA
Wide use of the Universal Serial Bus (USB) has led to a selection of overcurrent-protection circuits for supply rails of 2.7 to 5.5V, but few products are available for voltages higher than that range. The circuit breaker in Figure 1 operates on supply voltages to 26V and trips at a programmed current threshold.

IC1 is a high-side current-sense amplifier that monitors supply current via the voltage across R2 and generates a proportional but smaller current at the OUT terminal as follows:

19dieq2.gif (745 bytes)

R1 and R2 determine the trip current according to the equation,

19dieq3.gif (653 bytes)

The value of R1 in Figure 1 sets the trip current at 1A, but values to 10A are acceptable. Supply current at the trip level produces a voltage across R1 that triggers the low-battery comparator in IC2, a high-side, n-channel MOSFET driver. The comparator output (LBO) drives Q2 to saturation, causing the latched output of IC3, a micropower voltage monitor, to go low. Applied to IC2's Pin 2, this signal disconnects the power by turning off Q1.

Power remains off until you unlatch IC2 by depressing the reset button. You may also have to push the button following initial power-up to ensure the correct power-up state. For supply voltages of 12V and higher, choose R3 according to the table in the Figure 1. For supply voltage that is less than 12V, D1 and R3 are unnecessary. The signal delay from IC3 to the load via IC2 and Q1 has a turn-off time of approximately 7 µsec (Figure 2a) and a turn-on time of approximately 400 µsec (Figure 2b) (DI #2252)

Add-on modulator has high bandwidthMJ Salvati, Flushing Communications, Flushing, NY
The simple circuit in Figure 1 is an add-on modulator that converts the output of a continuous-wave (CW) source to either an amplitude-modulation (AM) or a suppressed-carrier-modulation (SCM) format. Because the circuit has unity gain and 50 Ohm input and output impedances, the CW generator's output-level indications remain valid. The frequency response is flat from 0.3 to 45 MHz and only 0.1 dB down at 0.1 and 60 MHz. The modulation bandwidth is similarly broad: flat to 50 kHz and 3 dB down at 15 Hz with the capacitive coupling shown in Figure 1. Modulation levels to 100% are possible. Because the modulation sensitivity is 10% per 100 mV rms of modulating signal, you can read the modulation level directly from the audio generator's output-level indicator.

The circuit is a variation of a standard LM1496/1596 amplitude-modulator setup. It differs from the standard in that it uses a toroidal transformer to provide impedance matching and maximally efficient drive for a low-impedance load, and it drives the modulation ports through unity-gain op amps. The op amp driving Pin 1 provides a high input impedance; thus, it lessens the demands on the audio source and allows practical values for the coupling capacitor. If the audio signal source has no dc component, you can omit the coupling capacitor. You can wind the toroidal transformer with 24-gauge telephone wire over a ferrite core taken from a Sony (www.sony.com) 1-421-302 line choke. A Ferronics (www.ferronics.com) 11-261-J or JW Miller (www.bellind.com) F-50-1 core work equally well. Figure 1 indicates the adjustment order for the four trim pots. Initially, set all pots to midpoint and inject a 50-mV rms carrier into the RF-input connector. Set the modulation-code switch to SCM and adjust the 5-kOhm pot for exactly 0V dc at Pin 5 of the MC1458. Next, connect an audio signal to the audio-input connector and switch the modulation mode to AM. Adjust both the 50-kOhm pot and the audio-signal level until you achieve 100% modulation with no peak clipping and no trough overshoot. Once the biasing is set, set the audio generator's output to exactly 500 mV rms then adjust the 20-kOhm pot for exactly 50% modulation. Last, set the RF input at exactly 50 mV rms and adjust the 100 Ohm pot for 50-mV rms output into a 50 Ohm load. (DI #2245)

Simulate signals for telecomm testsSamuel Kerem, Patton Electronics, Gaithersburg, MD
The circuit in Figure 1 is a miniature gadget that is helpful in telecommunication applications. The function of the device is to simulate data flow with predefined patterns and use these patterns to check a cable's or a receiver's functionality. The circuit generates a signal in accordance with alternating-mark-inversion (AMI) code. In this type of coding, pulses with alternating polarities represent ones; signals with zero amplitude represent zeros. Figure 2 shows some examples. The circuit can produce three AMI-code signal patterns: 1-1-1-1-…, 1-0-1-0-…, and 1-0-0-1-0-0-1-….

The circuit uses a strobe-pulse source, consisting of IC1A and IC1B. The strobe initiates on the falling edge of the clock only if the previous strobe pulse is over. The strobe-pulse duration is a function of R1C1. The pulse depends on the state of S1 and can be nonexistent or close to either 1.5 or 2.5 periods of the clock source (Figure 2b). Therefore, the strobe pulse cuts off at? zero, one, or two pulses from the original clock source (Figure 2c). IC2 divides the modified clock frequency by two and restores the duty cycle to 50%. The signal from IC2 alternatively switches IC3's internal amplifiers between inverting and noninverting modes with equivalent gain. Thus, IC3's output is a three-level signal.

R2, C2, IC4A, and IC4B introduce a delay of a few nanoseconds to set the internal amplifiers before the clock signal (Figure 2c) changes at IC3's inputs. R3 through R6 set the signal level to the appropriate range. You need IC5 only if your power supply cannot produce ±5V. You calculate the values of R1 and C1 for an 8.448-MHz clock source (E2 bit rate). For other clock rates, you must recalculate only C1's value. (DI #2247)


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