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04.23.98 Design Idea

-April 23, 1998

PLEASE NOTE:
FIGURES WILL LINK
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April 23, 1998
Circuit protects FPGAs from killer spikesNelson Nguyen, Anritsu Corp, Morgan Hill, CA
A project using Xilinx FPGAs brought an interesting problem to light. When you turn on the board, one FPGA in three succumbs to this problem. A lot of frustration and testing uncovered a negative-going spike (Figure 1) in the 5V line from the dc/dc converter. The system uses a dc/dc converter to convert -48V to 5V and other voltages. The spike occurs before the converter delivers its intended 5V. Spikes greater than 5V would kill the FPGA with the shortest path to the converter. The circuit in Figure 2 solves the problem.

Because the spike occurs before the 5V supply line turns on, to prevent the spike from destroying the FPGA, you should open the 5V path when you turn on the power switch and then close the path when the 5V supply voltage is present. The R19-C13 RC network provides a delay in turning relay K1 on. The turn-on voltage for K1 is approximately 3.7V. The voltage divider comprising R19 and K1's coil resistance (approximately 780 ohms for an NEC EA2-5NU) provides a voltage at the junction of C13 and R19 sufficient to turn K1 on. The value of C13 sets the delay at approximately 2 msec. (DI #2181)

Bootstrapped boost converter operates at 1.8VTom Gross, Linear Technology, Milpitas, CA
Many circuits, such as those that use batteries or solar cells, must operate in the face of decreasing supply voltages. The circuit in Figure 1 maintains the maximum load current as the supply voltage drops. The regulator boosts a 2.5 to 4.2V input to 5V and provides 2A load current, for 10W of output power. The circuit is a bootstrapped synchronous boost regulator that uses an LTC1266 synchronous-regulator controller. Diodes D1 through D5 allow the circuit to start up using the low input voltage and then to receive its power from the higher output voltage during normal operation. The crucial elements in the circuit are the switches: two IRF7401 n-channel MOSFETs. The MOSFETs receive full enhancement at low gate-source voltages. (At VGS=2V, the peak drain current is 15A.) The low enhancement voltages allow the circuit to start with low input voltages.

This low-voltage capability is important for low-series-cell-count, battery-powered systems. Diodes D3 and D4, along with capacitor C2, form a charge-pump circuit, which the controller uses for the MOSFETs' gate drive. Because the circuit receives its power from the 5V output voltage, the circuit still operates if the input supply voltage drops below the IC's minimum input voltage. This bootstrapping allows the circuit to start up when the input voltage is below the IC's 3.5V minimum input spec. With a 1A load, the regulator operates with inputs as low as 1.8V. Figure 2 shows the regulator's efficiency vs the input voltage with three load currents. With 2A load current, the efficiency drops as the input voltage decreases, because of the higher power losses in the inductor. A larger inductor would provide in-creased efficiency or allow for greater load currents. (DI #2185)

Video circuit clamps under all conditionsNicholas Gray and Terrance Smith, National Semiconductor, Santa Clara, CA
Many video-circuit clamps operate well in the presence of a composite-video signal but cannot achieve a clamp level with signals other than composite video or in the absence of an input signal. The circuit in Figure 1, developed for the ADC1175 (a popular and inexpensive, high-performance, 8-bit, 20M-sample/sec ADC), provides the normal back-porch clamp function to the input of the ADC in the presence of a composite-video signal. The circuit further ensures that the voltage presented to the ADC is within its correct operating range in the absence of an input signal and forces any signal other than composite video to be within the ADC's input common-mode range.

The circuit accomplishes video clamping by building a control loop that forces the dc voltage at IC2's output to a desired level during the blanking period. This level, approximately 25% of full scale for a composite-video signal, forces the ADC's output-pedestal (blanking) level to an 8-bit code of approximately 64. The simple filter comprising R3 and C3 bandlimits the signal at the output of IC2. This high-frequency attenuation is necessary to prevent noise spikes from upsetting the operation of the LM1881. The LM1881 is a video sync-separator chip that produces burst-gate pulses at its Pin 5 when a composite-video signal is present at Pin 2.

The burst-gate output of the LM1881 serves to sample the blanking level of the video signal. Potentiometer VR1 and R5 produce an adjustable offset in the signal path when Q1 gates on. During the blanking period, the ac-coupled burst-gate signal pulls Q2's base low (to approximately 4V), thus pulling Q1's gate high, thereby sampling and storing the sum of the video-blanking level and the dc offset from VR1 onto C7. At times other than the back-porch interval, Pin 5 of the LM1881 is high, and Q2 is off, thereby turning Q1 off. Divider R14-R15 attenuates the voltage on C7 to ensure sufficient phase margin in the clamp loop. IC4 is an integrator that averages the attenuated dc value over many samples. This average sums with the input signal in IC1.

If the integration time is too small, the result could be shading across the display. A long integration results in slow, perceptible adjustments when switching between fields with large differences in average brightness. The dc feedback path for IC4 is through IC1 and IC2. If no video signal exists or if the input signal has no sync, R11 holds Q2 on, thus holding the video output of the circuit within the ADC's operating range. With VR1 centered, the level halfway between the positive and negative peaks of the input signal clamps at approximately 1.6V, or approximately halfway between the high and low reference voltages (2.6 and 0.6V, respectively) of the ADC1175. The circuit achieves an effective number of bits of 7.5, corresponding to a signal-to-noise and distortion of 47 dB. Figure 2 shows the offset at Point B in Figure 1, relative to the voltage at Point A. (DI #2184)

$5 junk-box circuit determines phase sequenceHugh Adams, Fort Walton Beach, FL
Have you ever wondered which way a blower motor is going to turn when you plug it into another socket, or have you ever inherited the task of modifying three-phase wiring in your plant? The circuit in Figure 1 is a simple, approximately $5 phase sequencer that you can probably build from parts in your junk box and save approximately $50 to boot. The component values reflect 60-Hz operation, but the design equations in Figures 2 and 3 allow you to select values for other frequencies. The equations are in MathCAD spreadsheet format, but almost any other spreadsheet would do.

Referring to Figure 1 and the equations, you can see that the neon bulb that glows brighter indicates the phase sequence, or phase-rotation order, ABC or CBA. The bulb glows brighter because it carries more current because of the phase shift the 1.5-µF capacitor provides. You can verify this assertion by examining the two sets of equations. Note that the two sets of equations have different expressions for IB and IC. In one, IB lags IA by 2pi/3; in the other, it lags by 4pi/3, and vice versa for IC. The equations provide the mathematical way of reversing the phase sequence, and, as you can see, the two currents IB and IC reverse their relative magnitudes as the phase rotation reverses. (DI #2180)

Piezo device generates buzz, beep, or chimeDennis Eichenberg, Parma Heights, OH
Piezoelectric buzzers, such as the Murata (Smyrna, GA) PKB5-3A in Figure 1, make excellent alarms. They're compact, lightweight, efficient, and reliable. However, a piezo alarm is a dc device; it requires additional circuitry to operate from an ac source. The circuits in Figure 1 provide a simple and inexpensive way to obtain the dc drive. The W04G full-wave bridge rectifier produces a full-wave dc waveform from the 120V ac line. The 100 ohm resistor protects the circuit from surges when you first apply power. The 5.5V 1N4733 zener diode protects the buzzer against high-voltage excursions. The 1-µF capacitor provides filtering for the buzzer.

The circuit in Figure 1a produces a true buzzer sound. The addition of an F336HD flashing LED (part number 276-036 at Radio Shack) in Figure 1b changes the alarm to a beeper, and it also provides a visual alarm. The LED produces a constant pulse of light at approximately 1 Hz without the addition of a time-constant capacitor. The LED starts immediately when you apply power, and it's insensitive to temperature variations. The addition of a 35-µF capacitor in parallel with the buzzer (Figure 1c) changes the audible alarm to a pleasing chime. The value of the capacitor is not critical; you can obtain various sound effects by varying it. (DI #2194)

Smart switch cuts transformer turn-on currentRobert Lindsey, Hansvedt EDM, Urbana, IL
Transformer-core saturation can cause inexplicable fuse blowing, system crashes, or premature switch and relay failure. When a core saturates, it loses its inductive characteristics; primary winding current can then reach extremely high values for several ac cycles. Turning on a transformer may seem fundamental, but in some power-supply designs and control applications, it can be a game of Russian roulette. Because transformers remain polarized when turned off, saturation occurrence is a function of the polarity and phase angle of the ac cycle when you switch the circuit on and off. The smart-switch circuit in Figure 1 eliminates saturation, improves relay reliability, and provides a tool for determining transformer and relay performance.

The circuit goes beyond typical configurations using zero-crossing or peak-switching relays, by using the polarity of the ac cycle, known phase angles, and soft-starting techniques. Figure 2 shows that the primary turn-on current of a 220-VA transformer can be disastrous when you use a zero-crossing relay. Trace R1 shows 46A peak with a saturated core. Trace 1 shows only a few amps with use of the smart-switch circuit. This large difference in current demonstrates the value of the smart switch in controlling transformer magnetization. Switching on during a positive half cycle and off during a negative half cycle or vice versa prevents most core saturation.

Peak switching of the ac voltage during turn-on and -off further reduces the susceptibility to core saturation, regardless of ac polarity. This reduction is an important consideration in the event of an uncontrolled power outage. Figure 3, trace R, shows the primary current with peak and same-polarity switching. The vertical scale in Figures 2 and 3 is 10A per division, and Trace 2 is the relay control voltage. The primary current in Figure 3 causes some core saturation (note that the current is not bipolar), but the saturation is much lower than that in Figure 2. Trace 1 shows the reduced primary current with the use of peak and opposite-polarity switching. Note that transformer designs vary widely; some may favor particular phase angles.

Inrush current from power-supply filter capacitors is also an important design consideration. By using a resistor, an inrush device, or an inductive input filter in the secondary winding, you can reduce this inrush surge. Another solution is to soft-start the transformer by using a resistor in the primary to limit inrush and saturation currents to an acceptable level. After a brief delay, a second solid-state relay shunts the resistor. The Microchip 12C508 µC uses its internal 4-MHz RC oscillator for all timing. The chip is simple, inexpensive, reliable, and well-suited for this application. For wide temperature variations, you can obtain more accurate timing by using a 32-kHz crystal. To download Listing 1, the source code for the µC's operation, from EDN's Web site, click here:  Download DI-SIG, #2170.

You can use either zero-crossing or random relays, but the random type works better for transformers. Set Pin 4 high for zero-crossing relays and low for random-turn-on relays. The HCPL-3760 optocoupler determines the polarity and phase of the ac line. The coupler is configured as a near-zero detector. Its output is set to switch on at 50V ac and off at 25V ac. One internal diode in the optocoupler rectifies the ac signal to indicate the positive half cycle. The µC has two solid-state-relay outputs: SSR1 and SSR2. When the Transformer Enable input goes high, the µC waits 250 msec, detects the next positive edge from the optocoupler, waits 12 msec, and then turns off SSR1. SSR2 has a 250-msec delay from SSR1 and operates as a last-on, first-off output to shunt a soft-start resistor. Pin 3 is an optional output for a power-supply bleeder switch or a status indicator. (DI #2170)



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Copyright c 1998 EDN Magazine, EDN Access. EDN is a registered trademark of Reed Properties Inc, used under license. EDN is published by Cahners Business Information, a unit of Reed Elsevier Inc.

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