Faster time-to-market clock oscillator: Easing emissions compliance for circuit designers

-November 10, 2017

Since I was an analog/RF circuit designer for 16 years and an apps engineer for 23 years after that, I feel designer’s pain in trying to meet demanding release schedules for their systems while still meeting critical specs, reliability, and emissions compliance. So that’s why I am writing this product review for SiTime’s MEMS timing SiT9005, a spread spectrum oscillator (SSO).

So, what is it about this product that should excite circuit designers? Well, it is field programmable in a way that helps ensure emissions compliance. What this means to me is that there will be less troubleshooting, re-design and fewer production delays, not to mention re-testing/re-design costs to meet a failed or borderline emissions compliance test.

How do SiTime designers do that? First, there is the spread spectrum clocking as well as the ability to adjust the rise/fall time of the clock signal. Secondly, SiTime has a Time Machine II programmer that will help designers to reduce emissions pretty fast, before and even sometimes after sending the system for emissions compliance tests if the test results failed or were marginal in meeting compliance.

The frequency spectrum of typical square-wave clocks is composed of a fundamental tone as well as a slew of higher harmonics. Conventional techniques of filtering, shielding, and good PC layout practices can limit the EMI in a system, at added cost and using prime board space. The new device reduces EMI on the most dominant EMI sources. Let’s take a look how this is done.

Noise on the clock trace


Figure 1
Pesky noise emanating from the clock trace (Image courtesy of SiTime)

This kind of noise can be reduced in two ways with this new SiTime device. First, by using the flex edge slew rate control, a neat feature of this device that can slow down rise/fall times which reduces harmonic power reduction.

Figure 2
Harmonic EMI reduction with a slower rise/fall time (Image courtesy of SiTime)

Standard LVCMOS is OK for many applications, but when noise is an issue (when isn’t it?) then the SoftEdge technique by SiTime in this device really helps reduce noise.

Figure 3
An LVCMOS device vs. a SiTime SoftEdge solution (Image courtesy of SiTime)


The second way this device reduces noise on a clock trace is via Spread Spectrum.

Using Spread Spectrum Clock Generation (SSCG)1,2

Noisy processor EMI is getting worse with faster speeds and data rates being demanded by new applications like Cloud data centers and 5G infrastructure. Clock generators are often the largest or one of the largest sources of this noise.

The spreading of the energy in the clock signal is accomplished by frequency modulating (FM) the clock signal with a unique modulating waveform. This is demonstrated in Figure 4, where a harmonic of a clock signal is shown. In the frequency domain, the nth harmonic of a clock signal is represented by a delta function centered at a frequency of n times the fundamental frequency of the clock signal. With SSCG, the energy at each of these harmonics is spread over a wider bandwidth, thereby reducing the peak amplitude. In addition, the bandwidth, over which each harmonic is spread, increases linearly with frequency so that the attenuation provided by SSCG also increases linearly with frequency.

Figure 4 Spread Spectrum clocking can provide up to 17 dB carrier frequency reduction of EMI (Image courtesy of SiTime)


Noise on the serial/parallel data link

Figure 5
This kind of EMI noise on a data link can be improved with spread spectrum clocking (Image courtesy of SiTime)

Wave profiles for EMI reduction

This solution uses Triangular and Hershey Kiss profiles for improved EMI reduction.

In a spread spectrum technique, instead of concentrating all the clock energy at a single frequency, the energy is spread out via frequency modulation of the clock. The modulation profile can be triangular or non-linear like the ‘Hershey-Kiss’ profile. These two profiles are an optional factory configurable option.

A linear triangular profile uses a modulation frequency typically larger than 30 kHz (above the audio band).

Figure 6
A triangular wave profile; spread range +/- 5%; modulation rate 31.25 kHz (Image courtesy of SiTime)

The non-linear Hershey-Kiss profile gives better EMI performance; however, that kind of implementation usually will typically need a look-up table.

Figure 7
A Hershey-Kiss profile; spread range +/- 0.5%; Modulation rate 31.25 kHz (Image courtesy of SiTime)

Figure 8
Triangular vs. Hershey-Kiss profile; spread range/center spread +/- 1.25%; output frequency 37.125 MHz (Image courtesy of SiTime)

The SiT9005 has a wide spread range of as high as 4% with 0.125% steps. There are eight options for rise/fall settings.

The device is really small at 2.0 x 1.6 mm, and has an excellent frequency stability of +/− 20 ppm over a −40oC to +85oC temperature range. Start-up time is only 5 ms.

SiTime has a Time Machine II MEMS oscillator programmer for instant programmability and there will also be an “EMI reduction guide” available shortly that will aid designers in mapping their required EMI reduction to a particular part number.

For more information on this product please visit the SiTime website.

Steve Taranovich is a senior technical editor at EDN with 45 years of experience in the electronics industry.


  1. K. Hardin, J. Fessler, D. Bush “Spread Spectrum Clock Generation for the Reduction of Radiated Emissions,” IEEE International Symposium on Electromagnetic Compatibility, pp: 227-231, Aug. 1994.
  2. Y. Kao and Y. Hsieh, "A Fully Integrated Spread Spectrum Clock Generator by Using Direct VCO Modulation," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 55, pp. 1845 – 1853, Aug. 2008.


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