High-performance oscillators target cloud computing
Silicon Labs has introduced a new family of crystal oscillators for ultra-low jitter reference timing for 10G, 40G and 100G cloud computing and networking equipment.
The Si535 and Si536 oscillators use Silicon Labs’ DSPLL technology to provide unparalleled performance, stability and flexibility for 10/40G data center core/access switches, storage area networking equipment, security routers, enterprise switches/routers, and Carrier Ethernet switches and routers.
The devices offer jitter performance of <200 femtoseconds (fs) RMS jitter (integrated from 10 kHz to 1 MHz) for common Ethernet and Fibre Channel reference frequencies. They support LVDS and LVPECL output formats at 2.5 V and 3.3 V and offer both ±20 ppm and 31.5 ppm total stability, simplifying interfacing to a wide variety of processors, switches, PHYs and FPGAs. When combined with Silicon Labs’ Si533xx differential clock buffers, the Si535/536 provide low-jitter clock generation and distribution for SoCs requiring multiple high-performance reference clocks.
To support the increasing demand for cloud computing-based services, data center equipment is migrating to higher speed serial data transmission, often 10G or faster. In parallel, there is a significant trend to maximize energy efficiency by consolidating switching, storage and computing resources into fewer components. These trends have given rise to processors, Ethernet switch ICs and FPGAs with integrated High-Speed serializer-deserializer (SerDes) technology that requires low-jitter timing references. Silicon Labs’ Si535/536 oscillators provide the ultra-low jitter and ±20 ppm stability required by state-of-the-art cloud computing and networking infrastructure equipment.
The Si535/536 oscillators use the patented DSPLL technology to provide a low-jitter clock at High-Speed differential frequencies. Unlike a traditional crystal oscillator in which a different crystal is required for each output frequency, the Si535/536 XOs use a common fixed-frequency crystal to provide exceptional stability and reliability and leverage the DSPLL IC to generate any output frequency. In addition, DSPLL clock synthesis provides superior supply noise rejection, simplifying the task of generating low-jitter clocks in noisy environments typically found in data center and networking systems.
Oscillators based on DSPLL technology can be supplied at any output frequency without cutting and tuning a unique 3rd overtone (OT) crystal or surface acoustic wave (SAW) device, as required by competing low-jitter XOs. Silicon Labs’ mixed-signal IC-based approach also enables simplified factory programming at time of shipment, eliminating long lead times associated with custom oscillators. Si535/536 XO samples ship in two weeks, the shortest lead time in the high-performance frequency control industry.
“Cloud computing switches, routers and storage equipment are moving to higher speed serial data links, increasing the necessity for high-performance timing,” said Mike Petrowski, vice president and general manager of Silicon Labs’ timing products. “We combine unparalleled performance, simple device customization and a highly efficient manufacturing flow to deliver both standard and custom any-frequency XOs with short, reliable lead times, streamlining product design cycles and eliminating supply chain headaches.”
Samples and production quantities of the Si535/536 low-jitter oscillators are available now. Product pricing for the Si535/536 XOs in 10,000-unit quantities ranges from $8.24 to $11.35 (USD), depending on frequency and stability options. The Si5XX-EVB evaluation board, priced at $75 (USD MSRP), is available for device evaluation.
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This article originally appeared on EE Times Europe.